Introduction
This is a kit of the Hardware Basics series. Until now a circuit was the way its wires were connected: want another one — rewire it. In this kit a chip appears whose inner wiring is set by a file. You build the board once, then load firmware into the chip — and the board becomes an adder, a digit display or an electronic die. Load other firmware — and the same board, without a single new wire, does something else.
That chip is the GAL22V10, programmable logic from 1985. Lattice itself discontinued it in 2010, but the compatible ATF22V10C is still made, and its firmware is written in the same format as forty years ago. We build it ourselves, from the transistor up:
- lesson 1 — a transistor that remembers: a new part, the memory transistor, and how it stores a bit;
- lesson 2 — an 8 × 8 mini-PLD: a matrix of 64 such transistors, programmed by hand — a full adder, a comparator, two NOTs;
- lesson 3 — the GAL22V10: a 44 × 132 matrix, a macrocell made of familiar chips and the whole ready chip;
- lesson 4 — digits on a display: seven equations instead of a 150-transistor decoder, then letters — with other firmware;
- lesson 5 — a die: the flip-flops inside the GAL, and at the end a second GAL shows the rolled face as a digit.
What you need
The kit is standalone. Lesson 3 needs the gates NOT, NAND, OR, XOR, the FF4013 flip-flop and the TG switch — from any kit of the series. The ready GAL22V10 is the kit file GAL22V10.json, imported into the library with one ⬆ button. Firmware comes as .jed files, loaded into the chip with the Load .jed button in the ⚙ window.
How much it is
The mini-PLD is 64 memory transistors and 20 ordinary ones. The GAL22V10 is 6,932 transistors: 5,828 memory ones (5,808 in the matrix and 20 output settings) and 1,104 ordinary ones. A macrocell is 94 transistors, and the chip has ten.
This is a model of a real chip
| What | Real GAL22V10 | Ours |
|---|---|---|
| pins | 24, numbered as in the datasheet | the same; VCC, GND — shared labels |
| matrix | 44 × 132, 5,808 fuses | the same |
| fuse numbers | Lattice JEDEC map | the same — .jed files are compatible |
| macrocell | polarity, flip-flop, OE, S0/S1 | the same |
| signature (64 bits) | yes | in the file, not needed in the chip |
| pull-ups on pins | yes | yes |
| programming | a programmer, raised voltage | the Load .jed button |
What you will get
Five lessons: from a single memory transistor to a chip that is programmed with a file. At the end there are two identical GAL22V10 chips on the canvas: one is a die, the other a display with the number of the rolled face. The only difference between them is the firmware file.