Lesson 4. 8 bits and comparison: CMP is subtraction

After this lesson the adder becomes 8-bit — numbers from 0 to 255 — and three lamps answer which number is bigger: A = B, A < B or A > B. Nothing new has to be invented: two ADDSUB4 in a chain and the subtraction flags.

4.1. The idea: two halves

Eight bits are two halves of four. The carry from the low half (CO) goes to the carry input of the high half (CI) — just as it runs between digits inside ADDER4. The "plus 1" of subtraction is needed only once, in the very lowest digit, so SUB goes to CI only on the low ADDSUB4.

ADDSUB8 — two ADDSUB4 in a chain. The carry of the low half c4 goes to the CI of the high half, as between digits inside ADDER4. The "plus 1" of subtraction (SUB on CI) is only for the low half. The CO and V flags come from the high half: the sign bit is there.

Overflow V is computed from the top, sign bit — so we take it from the high half, and the V of the low half is not needed.

4.2. The idea: comparison is subtraction

To compare two numbers, subtract B from A and look at the flags:

A = B — the result is zero, Z is lit;
A < B — a borrow was needed, C = 0;
A > B — no borrow (C = 1), and the result is not zero.

That is how every processor compares numbers. The CMP (compare) instruction is a subtraction that keeps only the flags and throws the result away. The next instruction looks at the flags and decides where to jump.

4.3. Building

The same project. Delete the lesson 3 setup (9 switches, ADDSUB4 on the canvas, OR/OR/NOR, lamps, three displays); keep Power/Ground.

The idea. Eight bits are two halves of four. The carry from the low half (CO) goes to the carry input of the high half (CI) — just as the carry runs between digits inside ADDER4. The "plus 1" of subtraction is needed only once, in the very lowest digit, so SUB goes to CI only on the low ADDSUB4.

Comparison is subtraction. Subtract B from A and look at the flags:

A = B — the result is zero, Z is lit;
A < B — there was a borrow, C = 0;
A > B — no borrow (C = 1) and the result is not zero.

That is how every processor compares numbers: the CMP instruction is a subtraction that keeps only the flags, not the result.

Step 1. ADDSUB8 — two ADDSUB4 in a chain

Part	Pin	Label
Input port	out	A0
Input port	out	A1
Input port	out	A2
Input port	out	A3
Input port	out	A4
Input port	out	A5
Input port	out	A6
Input port	out	A7
Input port	out	B0
Input port	out	B1
Input port	out	B2
Input port	out	B3
Input port	out	B4
Input port	out	B5
Input port	out	B6
Input port	out	B7
Input port	out	SUB
ADDSUB4 (low 4 bits)	A0 A1 A2 A3 B0 B1 B2 B3 SUB CI S0 S1 S2 S3 CO V	A0 A1 A2 A3 B0 B1 B2 B3 SUB SUB S0 S1 S2 S3 c4 — (free)
ADDSUB4 (high 4 bits)	A0 A1 A2 A3 B0 B1 B2 B3 SUB CI S0 S1 S2 S3 CO V	A4 A5 A6 A7 B4 B5 B6 B7 SUB c4 S4 S5 S6 S7 CO V
Output port	in	S0
Output port	in	S1
Output port	in	S2
Output port	in	S3
Output port	in	S4
Output port	in	S5
Output port	in	S6
Output port	in	S7
Output port	in	CO
Output port	in	V

Ctrl+G → name ADDSUB8. Pins: inputs A0–A7, B0–B7, SUB; outputs S0–S7, CO, V.

The V pin of the low ADDSUB4 stays free: overflow is computed from the sign bit, and that is in the high half.

Step 2. Canvas: switches, adder, the Z flag

Part	Pin	Label
Input	out	A0
Input	out	A1
Input	out	A2
Input	out	A3
Input	out	A4
Input	out	A5
Input	out	A6
Input	out	A7
Input	out	B0
Input	out	B1
Input	out	B2
Input	out	B3
Input	out	B4
Input	out	B5
Input	out	B6
Input	out	B7
Input	out	SUB
ADDSUB8	A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 SUB S0 S1 S2 S3 S4 S5 S6 S7 CO V	A0 A1 A2 A3 A4 A5 A6 A7 B0 B1 B2 B3 B4 B5 B6 B7 SUB S0 S1 S2 S3 S4 S5 S6 S7 C V
OR	I0 I1 O0	S0 S1 z01
OR	I0 I1 O0	S2 S3 z23
OR	I0 I1 O0	S4 S5 z45
OR	I0 I1 O0	S6 S7 z67
OR	I0 I1 O0	z01 z23 z03
OR	I0 I1 O0	z45 z67 z47
NOR (zero)	I0 I1 O0	z03 z47 Z

Step 3. Comparison, lamps, displays

Part	Pin	Label
NOT	I0 O0	C nC
NOT	I0 O0	Z nZ
AND (equal)	I0 I1 O0	SUB Z EQ
AND (less)	I0 I1 O0	SUB nC LT
AND	I0 I1 O0	C nZ cnz
AND (greater)	I0 I1 O0	SUB cnz GT
LED (C — carry)	in	C
LED (Z — zero)	in	Z
LED (N — sign)	in	S7
LED (V — overflow)	in	V
LED (A = B)	in	EQ
LED (A < B)	in	LT
LED (A > B)	in	GT
Display	⚙	width 8, DEC, bus A
Display	⚙	width 8, DEC, bus B
Display	⚙	width 8, DEC, bus S

The comparison lamps go through AND with SUB: they stay dark when adding — comparing only makes sense by subtracting.

4.4. Check

The display shows unsigned numbers: 0…255. Signed, 1xxxxxxx are the negative ones (−128…−1), and then N is lit.

A	Switches A7…A0	B	Switches B7…B0	SUB	Display S	Lamps	Meaning
200	1100 1000	55	0011 0111	0	255	N	200 + 55 = 255
200	1100 1000	100	0110 0100	0	44	C	300 does not fit in 8 bits: 256 went into the carry
100	0110 0100	100	0110 0100	0	200	N, V	signed: 100 + 100 ≠ −56 — overflow
7	0000 0111	7	0000 0111	1	0	Z, C, A = B	equal
5	0000 0101	9	0000 1001	1	252	N, A < B	5 − 9 = −4; a borrow, C = 0
9	0000 1001	5	0000 0101	1	4	C, A > B	9 − 5 = 4
100	0110 0100	200	1100 1000	1	156	N, A < B	100 is less than 200
200	1100 1000	150	1001 0110	1	50	C, A > B	200 is more than 150

In the "Switches" columns the top switch (A7) is on the left and A0 on the right; 1 — on, 0 — off.

If only the high bits of the answer are wrong, check the CI of the high ADDSUB4: it must be on the label c4.

Lesson 4 paste (`Cmd+I`)

Needs NOT, AND, OR, NOR and ADDSUB4. Delete the lesson 3 setup, keep the power.

# Lesson 4 — 8 bits (ADDSUB8) and comparison by subtraction.chip ADDSUB8 {  portIn(A0)  portIn(A1)  portIn(A2)  portIn(A3)  portIn(A4)  portIn(A5)  portIn(A6)  portIn(A7)  portIn(B0)  portIn(B1)  portIn(B2)  portIn(B3)  portIn(B4)  portIn(B5)  portIn(B6)  portIn(B7)  portIn(SUB)  portOut(S0)  portOut(S1)  portOut(S2)  portOut(S3)  portOut(S4)  portOut(S5)  portOut(S6)  portOut(S7)  portOut(CO)  portOut(V)  ADDSUB4(A0=A0, A1=A1, A2=A2, A3=A3, B0=B0, B1=B1, B2=B2, B3=B3, SUB=SUB, CI=SUB, S0=S0, S1=S1, S2=S2, S3=S3, CO=c4)  ADDSUB4(A0=A4, A1=A5, A2=A6, A3=A7, B0=B4, B1=B5, B2=B6, B3=B7, SUB=SUB, CI=c4, S0=S4, S1=S5, S2=S6, S3=S7, CO=CO, V=V)} input(A0)input(A1)input(A2)input(A3)input(A4)input(A5)input(A6)input(A7)input(B0)input(B1)input(B2)input(B3)input(B4)input(B5)input(B6)input(B7)input(SUB)ADDSUB8(A0=A0, A1=A1, A2=A2, A3=A3, A4=A4, A5=A5, A6=A6, A7=A7, B0=B0, B1=B1, B2=B2, B3=B3, B4=B4, B5=B5, B6=B6, B7=B7, SUB=SUB, S0=S0, S1=S1, S2=S2, S3=S3, S4=S4, S5=S5, S6=S6, S7=S7, CO=C, V=V)OR(S0, S1, z01)OR(S2, S3, z23)OR(S4, S5, z45)OR(S6, S7, z67)OR(z01, z23, z03)OR(z45, z67, z47)NOR(z03, z47, Z)NOT(C, nC)NOT(Z, nZ)AND(SUB, Z, EQ)AND(SUB, nC, LT)AND(C, nZ, cnz)AND(SUB, cnz, GT)led(C)led(Z)led(S7)led(V)led(EQ)led(LT)led(GT)

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