Kits
›
La tarjeta de pago
RU
EN
ES
Contenido
Introduction
History: from cardboard to a computer
Lesson 0. Gates from transistors: for those who start from scratch
0.1. The idea: a transistor is a switch
0.2. Building
0.3. Check
Lesson 0 paste (Cmd+I)
Lesson 1. The ALU and register A: a calculator on switches
1.1. The idea: one action per clock
1.2. The idea: one adder for four operations
1.3. The idea: flags are the memory of the result
1.4. Building
1.5. Checking
Lesson 1 paste (Cmd+I)
Lesson 2. The program counter and ROM: lights by the program
2.1. The idea: a program is a list of commands
2.2. The idea: jumps and a subroutine
2.3. Building
2.4. Checking
Lesson 2 paste (Cmd+I)
Lesson 3. RAM from latches: a light through memory
3.1. The idea: the address is in the command
3.2. The idea: a latch writes while it is open
3.3. The idea: memory at power-on is garbage
3.4. Building
3.5. Checking
Lesson 3 paste (Cmd+I)
Lesson 4. Loops and conditions: multiplication by repeated addition
4.1. The idea: a counter down to zero
4.2. The program
4.3. Checking
Lesson 5. The IO wire and the card tester: echo
5.1. The idea: one wire for two
5.2. The idea: a byte bit by bit
5.3. The idea: the "exchange — wait" lamp
5.4. Building
5.5. Checking
Lesson 5 paste (Cmd+I)
Lesson 6. Personal data and the try counter: the card checks the PIN
6.1. The idea: the identity is in transistors
6.2. The idea: tries that are not erased
6.3. Building
6.4. Checking
Lesson 6 paste (Cmd+I)
Lesson 7. The card program: challenge-response
7.1. The idea: a secret that never leaves
7.2. The idea: a long answer in two commands
7.3. The program
7.4. Checking
Lesson 8. The card — into a chip with 8 legs
8.1. The idea: a card is what is inside
8.2. The idea: two cards — one program
8.3. Building
8.4. Checking
Lesson 8 paste (Cmd+I)
Summary
All the parts
Instructions in pictures
Lesson 1 in pictures
← Back to the lesson: Lesson 1. The ALU and register A: a calculator on switches
1
ALU and register A
a calculator on switches: 9 operations, flags C and Z
kh
HT-01
8b
200
A
+
8b
100
bv
=
8b
44
A
C
200 + 100 = 300 − 256 = 44, C = 1
IN
36×
OUT
29×
NOR
3×
0
NOT
9×
0
AND
17×
0
NAND
3×
0
XOR
18×
0
OR
16×
0
VCC
1×
GND
1×
0
13×
Q
Q
1×
4b
0
A
1×
2×
∞
Ctrl
+
G
SRLatch
DLatch
DFF
MUX2
RBIT
FA
AND4
OR4
OR8
DEC16
© 2026 Daniil Khanin · khanin.info · HT-01
12
SRLatch
1
IN
2×
OUT
2×
NOR
2×
0
6×
R
S
Q
nQ
NOR
I0
R
I1
nQ
O0
Q
NOR
I0
S
I1
Q
O0
nQ
2
Ctrl
+
G
Library
…
Chip N
2×
Library
…
SRLatch
Enter
SRLatch
R
S
Q
nQ
© 2026 Daniil Khanin · khanin.info · HT-01
13
DLatch
3
IN
2×
OUT
2×
NOT
1×
0
AND
2×
0
8×
D
EN
Q
nQ
NOT
I0
D
O0
nD
AND
I0
D
I1
EN
O0
setD
AND
I0
nD
I1
EN
O0
rstD
4
SRLatch
1×
4×
SRLatch
R
rstD
S
setD
Q
Q
nQ
nQ
© 2026 Daniil Khanin · khanin.info · HT-01
14
DLatch …
DFF
5
Ctrl
+
G
Library
…
Chip N
2×
Library
…
DLatch
Enter
DLatch
D
EN
Q
nQ
6
IN
2×
OUT
2×
NOT
1×
0
DLatch
2×
9×
D
CLK
Q
nQ
NOT
I0
CLK
O0
nCLK
DLatch
D
D
EN
nCLK
Q
mid
nQ
DLatch
D
mid
EN
CLK
Q
Q
nQ
nQ
© 2026 Daniil Khanin · khanin.info · HT-01
15
DFF …
MUX2
7
Ctrl
+
G
Library
…
Chip N
2×
Library
…
DFF
Enter
DFF
D
CLK
Q
nQ
8
IN
3×
OUT
1×
NOT
1×
0
NAND
2×
0
8×
A
B
S
Y
NOT
I0
S
O0
nS
NAND
I0
A
I1
nS
O0
na
NAND
I0
B
I1
S
O0
nb
© 2026 Daniil Khanin · khanin.info · HT-01
16
MUX2 …
RBIT
9
NAND
1×
0
3×
NAND
I0
na
I1
nb
O0
Y
10
Ctrl
+
G
Library
…
Chip N
2×
Library
…
MUX2
Enter
MUX2
A
B
S
Y
11
IN
4×
OUT
1×
MUX2
1×
AND
1×
0
DFF
1×
10×
D
LD
nR
CLK
Q
MUX2
A
Q
B
D
S
LD
Y
m
AND
I0
m
I1
nR
O0
d
DFF
D
d
CLK
CLK
Q
Q
nQ
© 2026 Daniil Khanin · khanin.info · HT-01
17
RBIT …
FA
12
Ctrl
+
G
Library
…
Chip N
2×
Library
…
RBIT
Enter
RBIT
D
LD
nR
CLK
Q
13
IN
3×
OUT
2×
XOR
2×
0
AND
1×
0
9×
A
B
CI
S
CO
XOR
I0
A
I1
B
O0
p
XOR
I0
p
I1
CI
O0
S
AND
I0
A
I1
B
O0
g
14
AND
1×
0
OR
1×
0
6×
AND
I0
p
I1
CI
O0
pc
OR
I0
g
I1
pc
O0
CO
© 2026 Daniil Khanin · khanin.info · HT-01
18
FA …
AND4
15
Ctrl
+
G
Library
…
Chip N
2×
Library
…
FA
Enter
FA
A
B
CI
S
CO
16
IN
4×
OUT
1×
AND
3×
0
9×
A
B
C
D
Y
AND
I0
A
I1
B
O0
ab
AND
I0
ab
I1
C
O0
abc
AND
I0
abc
I1
D
O0
Y
© 2026 Daniil Khanin · khanin.info · HT-01
19
AND4 …
OR4
17
Ctrl
+
G
Library
…
Chip N
2×
Library
…
AND4
Enter
AND4
A
B
C
D
Y
18
IN
4×
OUT
1×
OR
3×
0
9×
A
B
C
D
Y
OR
I0
A
I1
B
O0
ab
OR
I0
C
I1
D
O0
cd
OR
I0
ab
I1
cd
O0
Y
© 2026 Daniil Khanin · khanin.info · HT-01
20
OR4 …
OR8
19
Ctrl
+
G
Library
…
Chip N
2×
Library
…
OR4
Enter
OR4
A
B
C
D
Y
20
IN
8×
OUT
1×
A
B
C
D
E
F
G
H
Y
21
OR4
2×
10×
OR4
A
A
B
B
C
C
D
D
Y
lo
OR4
A
E
B
F
C
G
D
H
Y
hi
© 2026 Daniil Khanin · khanin.info · HT-01
21
OR8 …
DEC16
22
OR
1×
0
3×
OR
I0
lo
I1
hi
O0
Y
23
Ctrl
+
G
Library
…
Chip N
2×
Library
…
OR8
Enter
OR8
A
B
C
D
E
F
G
H
Y
24
IN
4×
OUT
16×
I0
I1
I2
I3
Y0
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
Y11
Y12
Y13
Y14
Y15
25
NOT
3×
0
6×
NOT
I0
I0
O0
n0
NOT
I0
I1
O0
n1
NOT
I0
I2
O0
n2
© 2026 Daniil Khanin · khanin.info · HT-01
22
DEC16 …
26
NOT
1×
0
AND4
1×
7×
NOT
I0
I3
O0
n3
AND4
A
n3
B
n2
C
n1
D
n0
Y
Y0
27
AND4
2×
10×
AND4
A
n3
B
n2
C
n1
D
I0
Y
Y1
AND4
A
n3
B
n2
C
I1
D
n0
Y
Y2
28
AND4
2×
10×
AND4
A
n3
B
n2
C
I1
D
I0
Y
Y3
AND4
A
n3
B
I2
C
n1
D
n0
Y
Y4
© 2026 Daniil Khanin · khanin.info · HT-01
23
DEC16 …
29
AND4
2×
10×
AND4
A
n3
B
I2
C
n1
D
I0
Y
Y5
AND4
A
n3
B
I2
C
I1
D
n0
Y
Y6
30
AND4
2×
10×
AND4
A
n3
B
I2
C
I1
D
I0
Y
Y7
AND4
A
I3
B
n2
C
n1
D
n0
Y
Y8
31
AND4
2×
10×
AND4
A
I3
B
n2
C
n1
D
I0
Y
Y9
AND4
A
I3
B
n2
C
I1
D
n0
Y
Y10
© 2026 Daniil Khanin · khanin.info · HT-01
24
DEC16 …
32
AND4
2×
10×
AND4
A
I3
B
n2
C
I1
D
I0
Y
Y11
AND4
A
I3
B
I2
C
n1
D
n0
Y
Y12
33
AND4
2×
10×
AND4
A
I3
B
I2
C
n1
D
I0
Y
Y13
AND4
A
I3
B
I2
C
I1
D
n0
Y
Y14
34
AND4
1×
5×
AND4
A
I3
B
I2
C
I1
D
I0
Y
Y15
35
Ctrl
+
G
Library
…
Chip N
2×
Library
…
DEC16
Enter
DEC16
I0–I3
Y0–Y15
© 2026 Daniil Khanin · khanin.info · HT-01
25
CANVAS
36
VCC
1×
GND
1×
0
3×
5×
VCC
VCC
GND
GND
0
ir12
0
ir13
0
ir14
37
0
5×
5×
0
ir15
0
bv0
0
bv1
0
bv2
0
bv3
38
0
4×
Q
Q
1×
5×
0
bv4
0
bv5
0
bv6
0
bv7
CLK
39
0
1×
NOT
1×
0
3×
0
RST
NOT
I0
RST
O0
nR
© 2026 Daniil Khanin · khanin.info · HT-01
26
CANVAS …
40
DEC16
1×
20×
DEC16
I0–I3
ir12…ir15
Y0
oLD
Y1
oST
Y2
oADD
Y3
oADC
Y4
oSUB
Y5
oAND
Y6
oOR
Y7
oXOR
Y8
oCMP
Y9
oJMP
Y10
oJZ
Y11
oJNZ
Y12
oJC
Y13
oJNC
Y14
oCALL
Y15
oRET
41
NOR
1×
0
OR
1×
0
6×
NOR
I0
ir15
I1
oST
O0
wA
OR
I0
wA
I1
oCMP
O0
wZ
© 2026 Daniil Khanin · khanin.info · HT-01
27
CANVAS …
42
OR4
1×
OR
1×
0
8×
OR4
A
oADD
B
oADC
C
oSUB
D
oCMP
Y
wC
OR
I0
oSUB
I1
oCMP
O0
sub
43
XOR
3×
0
9×
XOR
I0
bv0
I1
sub
O0
bx0
XOR
I0
bv1
I1
sub
O0
bx1
XOR
I0
bv2
I1
sub
O0
bx2
44
XOR
3×
0
9×
XOR
I0
bv3
I1
sub
O0
bx3
XOR
I0
bv4
I1
sub
O0
bx4
XOR
I0
bv5
I1
sub
O0
bx5
© 2026 Daniil Khanin · khanin.info · HT-01
28
CANVAS …
45
XOR
2×
0
AND
1×
0
9×
XOR
I0
bv6
I1
sub
O0
bx6
XOR
I0
bv7
I1
sub
O0
bx7
AND
I0
oADC
I1
fC
O0
adcC
46
OR
1×
0
FA
2×
13×
OR
I0
sub
I1
adcC
O0
cin
FA
A
acc0
B
bx0
CI
cin
S
sm0
CO
c1
FA
A
acc1
B
bx1
CI
c1
S
sm1
CO
c2
47
FA
3×
15×
FA
A
acc2
B
bx2
CI
c2
S
sm2
CO
c3
FA
A
acc3
B
bx3
CI
c3
S
sm3
CO
c4
FA
A
acc4
B
bx4
CI
c4
S
sm4
CO
c5
© 2026 Daniil Khanin · khanin.info · HT-01
29
CANVAS …
48
FA
3×
15×
FA
A
acc5
B
bx5
CI
c5
S
sm5
CO
c6
FA
A
acc6
B
bx6
CI
c6
S
sm6
CO
c7
FA
A
acc7
B
bx7
CI
c7
S
sm7
CO
cout
49
AND
3×
0
9×
AND
I0
acc0
I1
bv0
O0
la0
AND
I0
acc1
I1
bv1
O0
la1
AND
I0
acc2
I1
bv2
O0
la2
50
AND
3×
0
9×
AND
I0
acc3
I1
bv3
O0
la3
AND
I0
acc4
I1
bv4
O0
la4
AND
I0
acc5
I1
bv5
O0
la5
© 2026 Daniil Khanin · khanin.info · HT-01
30
CANVAS …
51
AND
2×
0
OR
1×
0
9×
AND
I0
acc6
I1
bv6
O0
la6
AND
I0
acc7
I1
bv7
O0
la7
OR
I0
acc0
I1
bv0
O0
lo0
52
OR
3×
0
9×
OR
I0
acc1
I1
bv1
O0
lo1
OR
I0
acc2
I1
bv2
O0
lo2
OR
I0
acc3
I1
bv3
O0
lo3
53
OR
3×
0
9×
OR
I0
acc4
I1
bv4
O0
lo4
OR
I0
acc5
I1
bv5
O0
lo5
OR
I0
acc6
I1
bv6
O0
lo6
© 2026 Daniil Khanin · khanin.info · HT-01
31
CANVAS …
54
OR
1×
0
XOR
2×
0
9×
OR
I0
acc7
I1
bv7
O0
lo7
XOR
I0
acc0
I1
bv0
O0
lx0
XOR
I0
acc1
I1
bv1
O0
lx1
55
XOR
3×
0
9×
XOR
I0
acc2
I1
bv2
O0
lx2
XOR
I0
acc3
I1
bv3
O0
lx3
XOR
I0
acc4
I1
bv4
O0
lx4
56
XOR
3×
0
9×
XOR
I0
acc5
I1
bv5
O0
lx5
XOR
I0
acc6
I1
bv6
O0
lx6
XOR
I0
acc7
I1
bv7
O0
lx7
© 2026 Daniil Khanin · khanin.info · HT-01
32
CANVAS …
57
MUX2
3×
12×
MUX2
A
sm0
B
lx0
S
oXOR
Y
r1_0
MUX2
A
sm1
B
lx1
S
oXOR
Y
r1_1
MUX2
A
sm2
B
lx2
S
oXOR
Y
r1_2
58
MUX2
3×
12×
MUX2
A
sm3
B
lx3
S
oXOR
Y
r1_3
MUX2
A
sm4
B
lx4
S
oXOR
Y
r1_4
MUX2
A
sm5
B
lx5
S
oXOR
Y
r1_5
59
MUX2
3×
12×
MUX2
A
sm6
B
lx6
S
oXOR
Y
r1_6
MUX2
A
sm7
B
lx7
S
oXOR
Y
r1_7
MUX2
A
r1_0
B
lo0
S
oOR
Y
r2_0
© 2026 Daniil Khanin · khanin.info · HT-01
33
CANVAS …
60
MUX2
3×
12×
MUX2
A
r1_1
B
lo1
S
oOR
Y
r2_1
MUX2
A
r1_2
B
lo2
S
oOR
Y
r2_2
MUX2
A
r1_3
B
lo3
S
oOR
Y
r2_3
61
MUX2
3×
12×
MUX2
A
r1_4
B
lo4
S
oOR
Y
r2_4
MUX2
A
r1_5
B
lo5
S
oOR
Y
r2_5
MUX2
A
r1_6
B
lo6
S
oOR
Y
r2_6
62
MUX2
3×
12×
MUX2
A
r1_7
B
lo7
S
oOR
Y
r2_7
MUX2
A
r2_0
B
la0
S
oAND
Y
r3_0
MUX2
A
r2_1
B
la1
S
oAND
Y
r3_1
© 2026 Daniil Khanin · khanin.info · HT-01
34
CANVAS …
63
MUX2
3×
12×
MUX2
A
r2_2
B
la2
S
oAND
Y
r3_2
MUX2
A
r2_3
B
la3
S
oAND
Y
r3_3
MUX2
A
r2_4
B
la4
S
oAND
Y
r3_4
64
MUX2
3×
12×
MUX2
A
r2_5
B
la5
S
oAND
Y
r3_5
MUX2
A
r2_6
B
la6
S
oAND
Y
r3_6
MUX2
A
r2_7
B
la7
S
oAND
Y
r3_7
65
MUX2
3×
12×
MUX2
A
r3_0
B
bv0
S
oLD
Y
res0
MUX2
A
r3_1
B
bv1
S
oLD
Y
res1
MUX2
A
r3_2
B
bv2
S
oLD
Y
res2
© 2026 Daniil Khanin · khanin.info · HT-01
35
CANVAS …
66
MUX2
3×
12×
MUX2
A
r3_3
B
bv3
S
oLD
Y
res3
MUX2
A
r3_4
B
bv4
S
oLD
Y
res4
MUX2
A
r3_5
B
bv5
S
oLD
Y
res5
67
MUX2
2×
8×
MUX2
A
r3_6
B
bv6
S
oLD
Y
res6
MUX2
A
r3_7
B
bv7
S
oLD
Y
res7
68
RBIT
2×
10×
RBIT
D
res0
LD
wA
nR
nR
CLK
CLK
Q
acc0
RBIT
D
res1
LD
wA
nR
nR
CLK
CLK
Q
acc1
© 2026 Daniil Khanin · khanin.info · HT-01
36
CANVAS …
69
RBIT
2×
10×
RBIT
D
res2
LD
wA
nR
nR
CLK
CLK
Q
acc2
RBIT
D
res3
LD
wA
nR
nR
CLK
CLK
Q
acc3
70
RBIT
2×
10×
RBIT
D
res4
LD
wA
nR
nR
CLK
CLK
Q
acc4
RBIT
D
res5
LD
wA
nR
nR
CLK
CLK
Q
acc5
71
RBIT
2×
10×
RBIT
D
res6
LD
wA
nR
nR
CLK
CLK
Q
acc6
RBIT
D
res7
LD
wA
nR
nR
CLK
CLK
Q
acc7
© 2026 Daniil Khanin · khanin.info · HT-01
37
CANVAS …
72
OR8
1×
9×
OR8
A
res0
B
res1
C
res2
D
res3
E
res4
F
res5
G
res6
H
res7
Y
nz
73
NOT
1×
0
RBIT
1×
7×
NOT
I0
nz
O0
zr
RBIT
D
zr
LD
wZ
nR
nR
CLK
CLK
Q
fZ
74
RBIT
1×
5×
RBIT
D
cout
LD
wC
nR
nR
CLK
CLK
Q
fC
75
4b
0
A
1×
2×
2×
8b
0
acc
fZ
fC
LD
0000
1100 1000 (200)
CLK
CLK
8b
200
A
C
Z
ADD
0010
0110 0100 (100)
CLK
CLK
8b
44
A
C
Z
SUB
0100
0010 1100 (44)
CLK
CLK
8b
0
A
C
Z
© 2026 Daniil Khanin · khanin.info · HT-01
38
← Back to the lesson
Lesson 1. The ALU and register A: a calculator on switches