Lesson 2. The F/F flip-flop
In picturesAfter this lesson the library has the flip-flop the CD4029 counter is made of: it can load a bit at once, and on the clock — flip or stay. We try it with switches and a generator.
2.1. Idea: a counter is flip-flops that flip
A binary counter is a row of flip-flops. On every clock the lowest bit always flips, the next one — only if the lower was 1 (counting up) or 0 (counting down). So each flip-flop must be able to do three things:
- load — at once, without the clock (to set the counter to any number:
PE); - flip on the clock — when allowed (
TE= 0); - hold — when not allowed (
TE= 1).
2.2. Idea: flipping through exclusive OR
Inside is an ordinary D flip-flop: on the clock it remembers what is at input D. Feed D with NOT Q and the flip-flop flips; feed it Q and it stays. XOR chooses: D = NOT(Q XOR TE).
TE= 0:QXOR 0 =Q,D= NOTQ— flip;TE= 1:QXOR 1 = NOTQ,D=Q— hold.
2.3. Idea: a NAND with three inputs
A D flip-flop with loading is the classic 7474 circuit: six 3-input NANDs. We build NAND3 straight from transistors — this is how it is made inside a chip.
2.4. Build
The same project. The library needs NOT, NAND, XOR (lesson 0) and CD4011 (lesson 1). The lesson 1 probe can be deleted.
Step 1. Chip NAND3 — NAND with 3 inputs from 6 transistors
If NAND3 is already in the library (for example, from the "74-Series Chips" kit), skip this step.
As inside a CMOS chip: three pmos in parallel from VCC to the output, three nmos in a chain from the output to GND. The output is 0 only when all three inputs are 1. Transistor: gate, drain, source.
| Part | Pin | Label |
|---|---|---|
| Input port | output | A |
| Input port | output | B |
| Input port | output | C |
| Output port | input | Y |
| pmos | gate drain source | A Y VCC |
| pmos | gate drain source | B Y VCC |
| pmos | gate drain source | C Y VCC |
| nmos | gate drain source | A Y m1 |
| nmos | gate drain source | B m1 m2 |
| nmos | gate drain source | C m2 GND |
Ctrl+G → name NAND3. Legs: inputs A, B, C; outputs Y.
Step 2. Chip FF4029 — the F/F flip-flop of the CD4029 counter
On the TI drawing (Fig. 9) the flip-flop is a box with a table; inside — a D flip-flop (six 3-input NANDs, as in the 7474) and three controls. PE = 0 — load at once (through set sdn / reset rdn). On the falling edge of CL: TE = 0 — flip (D = NOT Q, through XOR and NOT), TE = 1 — hold. What is loaded is NOT J: the CD4029 itself has an inverter in front of J, so the whole chip loads the number as it is.
| Part | Pin | Label |
|---|---|---|
| Input port | output | PE |
| Input port | output | J |
| Input port | output | TE |
| Input port | output | CL |
| Output port | input | Q |
| Output port | input | QN |
| NOT | I0 O0 | CL cp |
| NOT | I0 O0 | PE ld |
| NOT | I0 O0 | J jn |
| NAND | I0 I1 O0 | ld jn sdn |
| NAND | I0 I1 O0 | ld J rdn |
| XOR | I0 I1 O0 | Q TE x |
| NOT | I0 O0 | x d |
| NAND3 | A B C Y | sdn n4 n2 n1 |
| NAND3 | A B C Y | n1 rdn cp n2 |
| NAND3 | A B C Y | n2 cp n4 n3 |
| NAND3 | A B C Y | n3 rdn d n4 |
| NAND3 | A B C Y | sdn n2 QN Q |
| NAND3 | A B C Y | Q n3 rdn QN |
Ctrl+G → name FF4029. Legs: inputs PE, J, TE, CL; outputs Q, QN.
Step 3. Probe: switches and generator
Clock — click the body up to 1Hz.
| Part | Pin | Label |
|---|---|---|
| Power | output | VCC |
| Ground | output | GND |
Step 4. Flip-flop
| Part | Pin | Label |
|---|---|---|
| Input (switch) | output | PE |
| Input (switch) | output | J |
| Input (switch) | output | TE |
| Clock | output | CL |
| FF4029 | PE J TE CL Q QN | PE J TE CL Q QN |
Step 5. Lamps
| Part | Pin | Label |
|---|---|---|
| LED | input | CL |
| LED | input | Q |
| LED | input | QN |
2.5. Check
Clock—1Hz.PE= 0,J= 0:Qis lit — NOTJwas loaded.J= 1 —Qgoes out.PE= 1 (loading off),TE= 0:QandQNswap on every falling edge ofCL— when theCLlamp goes out.Qblinks half as often asCL: the flip-flop divides by 2.TE= 1 —Qfreezes: the clock runs, the flip-flop holds.
| PE | TE | Q | What it is |
|---|---|---|---|
| 0 | — | NOT J, at once | load (no clock needed) |
| 1 | 0 | changes on the fall | flip — counting |
| 1 | 1 | stays | hold |
After the check delete the probe (frame and Delete) — NAND3 and FF4029 stay in the library.
Lesson 2 paste (Cmd+I)
You need the gates NOT, NAND, XOR (lesson 0).
# Lesson 2 — the F/F flip-flop of the CD4029 counter: NAND3 from transistors, a D flip-flop from six NAND3, load and flip.# Paste: Cmd+I into the same project (NOT, NAND, XOR from lesson 0 needed). chip NAND3 { portIn(A) portIn(B) portIn(C) portOut(Y) pmos(A, Y, VCC) pmos(B, Y, VCC) pmos(C, Y, VCC) nmos(A, Y, m1) nmos(B, m1, m2) nmos(C, m2, GND)} chip FF4029 { portIn(PE) portIn(J) portIn(TE) portIn(CL) portOut(Q) portOut(QN) NOT(CL, cp) NOT(PE, ld) NOT(J, jn) NAND(ld, jn, sdn) NAND(ld, J, rdn) XOR(Q, TE, x) NOT(x, d) NAND3(A=sdn, B=n4, C=n2, Y=n1) NAND3(A=n1, B=rdn, C=cp, Y=n2) NAND3(A=n2, B=cp, C=n4, Y=n3) NAND3(A=n3, B=rdn, C=d, Y=n4) NAND3(A=sdn, B=n2, C=QN, Y=Q) NAND3(A=Q, B=n3, C=rdn, Y=QN)} power(VCC)ground(GND)input(PE)input(J)input(TE)clock(CL)FF4029(PE=PE, J=J, TE=TE, CL=CL, Q=Q, QN=QN)led(CL)led(Q)led(QN)¿No te sale? Algo no funciona →