Lesson 1. The 128 × 128 screen: seven bits instead of six

In pictures

After this lesson the Sierpinski triangle draws itself on a 128 × 128 screen — the same one as in The Fractal Machine, but four times as detailed. This is a test of the new screen and the scan: in lesson 5 the Mandelbrot set is computed on the same kind of scan.


1.1. The idea: one more bit

The dot number along each axis is a binary number. A 64 × 64 screen needed 6 bits, and 128 = 2⁷ needs a seventh. Everything else is the same scan:

  • counter X runs along the row, the next dot on every clock;
  • at the end of the row its carry cx moves the row counter Y;
  • a frame is 128 × 128 = 16,384 clocks.
64 × 64128 × 1286 bits · 729 dots7 bits · 2,187 dots
The same Sierpinski triangle on 64 × 64 (6 bits) and on 128 × 128 (7 bits). One more bit — the picture is three copies of the previous one, three times as many dots.

1.2. The idea: reset from outside

In The Fractal Machine every counter inverted RST with its own NOT. Real circuits do it differently: the reset arrives already inverted — nRST, "0 means reset" — and there is one NOT for the whole board. In this kit we do the same: counters, registers and the random generator get nRST. The screen is cleared by RST itself, on its CLR pin.

1.3. Building

New project. You need the chips NOT, XOR, AND, OR, NOR, DFF from HB-03. Place Power and Ground.

Step 1. CNT7 — a seven-bit counter

PartPinLabel
Input portoutCLK
Input portoutEN
Input portoutnRST
Output portinQ0
Output portinQ1
Output portinQ2
Output portinQ3
Output portinQ4
Output portinQ5
Output portinQ6
Output portinCO
XOR (bit 0)I0
I1
O0
Q0
EN
t0
AND (reset 0)I0
I1
O0
t0
nRST
d0
AND (carry 0)I0
I1
O0
EN
Q0
c1
DFF (bit 0)D
CLK
Q
nQ
d0
CLK
Q0
— (free)
XOR (bit 1)I0
I1
O0
Q1
c1
t1
AND (reset 1)I0
I1
O0
t1
nRST
d1
AND (carry 1)I0
I1
O0
c1
Q1
c2
DFF (bit 1)D
CLK
Q
nQ
d1
CLK
Q1
— (free)
XOR (bit 2)I0
I1
O0
Q2
c2
t2
AND (reset 2)I0
I1
O0
t2
nRST
d2
AND (carry 2)I0
I1
O0
c2
Q2
c3
DFF (bit 2)D
CLK
Q
nQ
d2
CLK
Q2
— (free)
XOR (bit 3)I0
I1
O0
Q3
c3
t3
AND (reset 3)I0
I1
O0
t3
nRST
d3
AND (carry 3)I0
I1
O0
c3
Q3
c4
DFF (bit 3)D
CLK
Q
nQ
d3
CLK
Q3
— (free)
XOR (bit 4)I0
I1
O0
Q4
c4
t4
AND (reset 4)I0
I1
O0
t4
nRST
d4
AND (carry 4)I0
I1
O0
c4
Q4
c5
DFF (bit 4)D
CLK
Q
nQ
d4
CLK
Q4
— (free)
XOR (bit 5)I0
I1
O0
Q5
c5
t5
AND (reset 5)I0
I1
O0
t5
nRST
d5
AND (carry 5)I0
I1
O0
c5
Q5
c6
DFF (bit 5)D
CLK
Q
nQ
d5
CLK
Q5
— (free)
XOR (bit 6)I0
I1
O0
Q6
c6
t6
AND (reset 6)I0
I1
O0
t6
nRST
d6
AND (carry 6)I0
I1
O0
c6
Q6
CO
DFF (bit 6)D
CLK
Q
nQ
d6
CLK
Q6
— (free)

Ctrl+G → name CNT7. Pins: inputs CLK, EN, nRST; outputs Q0–Q6, CO.

Step 2. The screen

Place a Dot display and set it up in ⚙:

Screen setting (⚙)Value
LayoutDots
Height, dots128
Width, dots128
Port width1 dot

Step 3. Canvas: clock, reset, two counters, the Sierpinski pattern, the screen

The test pattern is the Sierpinski triangle from HB-03, now on seven bits: a dot is lit if (x AND y) = 0.

PartPinLabel
ClockoutCLK
InputoutRST
NOT (reset)I0
O0
RST
nRST
NOT (screen clock)I0
O0
CLK
nCLK
CNT7 (column X)CLK
EN
nRST
Q0
Q1
Q2
Q3
Q4
Q5
Q6
CO
CLK
VCC
nRST
x0
x1
x2
x3
x4
x5
x6
cx
CNT7 (row Y)CLK
EN
nRST
Q0
Q1
Q2
Q3
Q4
Q5
Q6
CO
CLK
cx
nRST
y0
y1
y2
y3
y4
y5
y6
cy
AND (bit 0)I0
I1
O0
x0
y0
a0
AND (bit 1)I0
I1
O0
x1
y1
a1
AND (bit 2)I0
I1
O0
x2
y2
a2
AND (bit 3)I0
I1
O0
x3
y3
a3
AND (bit 4)I0
I1
O0
x4
y4
a4
AND (bit 5)I0
I1
O0
x5
y5
a5
AND (bit 6)I0
I1
O0
x6
y6
a6
ORI0
I1
O0
a0
a1
o01
ORI0
I1
O0
a2
a3
o23
ORI0
I1
O0
a4
a5
o45
ORI0
I1
O0
o01
o23
o03
ORI0
I1
O0
o45
a6
o46
NORI0
I1
O0
o03
o46
pix
Dot displayX0
X1
X2
X3
X4
X5
X6
Y0
Y1
Y2
Y3
Y4
Y5
Y6
D0
WE
CLK
CLR
x0
x1
x2
x3
x4
x5
x6
y0
y1
y2
y3
y4
y5
y6
pix
VCC
nCLK
RST

The Clock at 60Hz shows the scan running, but a frame of 16,384 dots takes 4.5 minutes. Click the clock body up to 4kHz — a frame in 4 seconds.

1.4. Check

What to doWhat you see
RST on, 2–3 clocks, RST offthe screen is clear, the counters at zero — the scan starts at the top left corner
Clock 60Hzdots run along the row, row after row — a frame in 4.5 minutes
Clock 4kHza frame in 4 seconds: the Sierpinski triangle over the whole screen
Look at the bottom right cornerthe bottom right corner is dark: 127 AND 127 = 127
Look at the left column and the top rowfully lit: x = 0 or y = 0 — AND gives 0

If only the top half of the screen is lit, check the Dot display pin Y6 (label y6) and Height, dots = 128. If the picture repeats, the seventh bit of one of the CNT7 is not on its label.


Lesson 1 paste (Cmd+I)

You need NOT, XOR, AND, OR, NOR, DFF from The Fractal Machine (lessons 0 and 1).

# Lesson 1 — the 128 x 128 screen: the 7-bit counter CNT7 and the raster scan; check — the Sierpinski triangle.chip CNT7 {  portIn(CLK)  portIn(EN)  portIn(nRST)  portOut(Q0)  portOut(Q1)  portOut(Q2)  portOut(Q3)  portOut(Q4)  portOut(Q5)  portOut(Q6)  portOut(CO)  XOR(Q0, EN, t0)  AND(t0, nRST, d0)  AND(EN, Q0, c1)  DFF(D=d0, CLK=CLK, Q=Q0)  XOR(Q1, c1, t1)  AND(t1, nRST, d1)  AND(c1, Q1, c2)  DFF(D=d1, CLK=CLK, Q=Q1)  XOR(Q2, c2, t2)  AND(t2, nRST, d2)  AND(c2, Q2, c3)  DFF(D=d2, CLK=CLK, Q=Q2)  XOR(Q3, c3, t3)  AND(t3, nRST, d3)  AND(c3, Q3, c4)  DFF(D=d3, CLK=CLK, Q=Q3)  XOR(Q4, c4, t4)  AND(t4, nRST, d4)  AND(c4, Q4, c5)  DFF(D=d4, CLK=CLK, Q=Q4)  XOR(Q5, c5, t5)  AND(t5, nRST, d5)  AND(c5, Q5, c6)  DFF(D=d5, CLK=CLK, Q=Q5)  XOR(Q6, c6, t6)  AND(t6, nRST, d6)  AND(c6, Q6, CO)  DFF(D=d6, CLK=CLK, Q=Q6)} clock{rt=60}(CLK)input(RST)NOT(RST, nRST)NOT(CLK, nCLK)CNT7(CLK=CLK, EN=VCC, nRST=nRST, Q0=x0, Q1=x1, Q2=x2, Q3=x3, Q4=x4, Q5=x5, Q6=x6, CO=cx)CNT7(CLK=CLK, EN=cx, nRST=nRST, Q0=y0, Q1=y1, Q2=y2, Q3=y3, Q4=y4, Q5=y5, Q6=y6, CO=cy)AND(x0, y0, a0)AND(x1, y1, a1)AND(x2, y2, a2)AND(x3, y3, a3)AND(x4, y4, a4)AND(x5, y5, a5)AND(x6, y6, a6)OR(a0, a1, o01)OR(a2, a3, o23)OR(a4, a5, o45)OR(o01, o23, o03)OR(o45, a6, o46)NOR(o03, o46, pix)dotdisplay SCR{layout=dots, w=128, h=128}(X0=x0, X1=x1, X2=x2, X3=x3, X4=x4, X5=x5, X6=x6, Y0=y0, Y1=y1, Y2=y2, Y3=y3, Y4=y4, Y5=y5, Y6=y6, D0=pix, WE=VCC, CLK=nCLK, CLR=RST)

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