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›
Transistor Memory
RU
EN
ES
Contents
Before you start
A bit of history: how computers remembered
Lesson 1. Cell and row: a 4-bit word
1.1. The idea: memory is a lot of latches
1.2. The cell: a latch and a "tap"
1.3. The row: 4 cells with shared wires
1.4. Building
1.5. Check
Lesson 1 paste (Cmd+I)
Lesson 2. 16×4 memory: sixteen rows and picking one
2.1. The idea: pick one row out of sixteen
2.2. Why reading uses gates and not a shared wire
2.3. Building
2.4. Check
Lesson 2 paste (Cmd+I)
Lesson 3. 256×4 memory: the same circuit one level up
3.1. The idea: the address splits in half
3.2. The cost
3.3. Building
3.4. Check
Lesson 3 paste (Cmd+I)
Lesson 4. Your own memory in the processor — and the first error
4.1. What is in the machine now and how our memory differs
4.2. Memory at power-on — "whatever"
4.3. Building
4.4. Running it — and the error
4.5. Looking for the cause with the oscilloscope
Lesson 4 paste (Cmd+I)
Lesson 5. Two-phase clock: the write never meets a new address
5.1. The idea: put "new address" and "write" into different slices
5.2. Why it doesn't break now
5.3. Building
5.4. Check
Lesson 5 paste (Cmd+I)
Summary
All the parts
Instructions in pictures
Lesson 1 in pictures
← Back to the lesson: Lesson 1. Cell and row: a 4-bit word
1
Cell and row
a latch + an output "tap" → a 4-bit word
kh
GW-03
0
1
0
1
W
W
1
R
4b
5
wO
IN
6×
OUT
4×
DLatch
4×
AND
4×
VCC
1×
GND
1×
0
5×
Q
Q
1×
4b
0
A
2×
∞
Ctrl
+
G
WORD4
© 2026 Daniil Khanin · khanin.info · GW-03
4
WORD4
1
IN
6×
OUT
4×
D0
D1
D2
D3
W
R
O0
O1
O2
O3
2
DLatch
3×
9×
DLatch
D
D0
EN
W
Q
q0
nQ
DLatch
D
D1
EN
W
Q
q1
nQ
DLatch
D
D2
EN
W
Q
q2
nQ
3
DLatch
1×
AND
2×
9×
DLatch
D
D3
EN
W
Q
q3
nQ
AND
A
q0
B
R
Y
O0
AND
A
q1
B
R
Y
O1
© 2026 Daniil Khanin · khanin.info · GW-03
5
WORD4 …
CANVAS
4
AND
2×
6×
AND
A
q2
B
R
Y
O2
AND
A
q3
B
R
Y
O3
5
Ctrl
+
G
Library
…
Chip N
2×
Library
…
WORD4
Enter
WORD4
D0
D1
D2
D3
W
R
O0
O1
O2
O3
6
VCC
1×
GND
1×
2×
VCC
VCC
GND
GND
7
0
5×
5×
0
wD0
0
wD1
0
wD2
0
wD3
0
wR
© 2026 Daniil Khanin · khanin.info · GW-03
6
CANVAS …
8
Q
Q
1×
WORD4
1×
11×
W
W
wW
WORD4
D0
wD0
D1
wD1
D2
wD2
D3
wD3
W
wW
R
wR
O0
wO0
O1
wO1
O2
wO2
O3
wO3
9
4b
0
A
2×
4b
0
wD
4b
0
wO
10
4b
0
wD
⚙
4b
8b
HEX
PIN
wD
wO
Enter
0
1
0
1
W
W
4b
5
wO
1
0
1
0
W —
4b
5
wO
© 2026 Daniil Khanin · khanin.info · GW-03
7
← Back to the lesson
Lesson 1. Cell and row: a 4-bit word