Lesson 1. Cell and row: a 4-bit word

In the Game & Watch processor all memory is the ram primitive: place it, set it up, and it remembers. How it works inside, you can't see. In this kit we build memory ourselves — from the same latches that held the watch digits in the first kit. After this lesson you will have a memory row WORD4: it stores 4 bits at the press of a button and gives them out when asked.

1.1. The idea: memory is a lot of latches

One bit can be held by a latch DLatch (the first kit, lesson 2): while its EN input is one, its output Q follows the input D; take the one away, and Q holds the last value for as long as you like.

A memory of 256 cells is a thousand such latches plus a way to pick the right ones. First, let's teach one latch two things that the big memory will need:

• "write" — the latch takes a new value only when it is allowed to (W = 1);
• "give" — the latch lets its bit out only when it is selected (R = 1); the rest of the time its output is zero.

Why the second one: in the next lesson the outputs of sixteen rows meet at one point. If the rows that aren't selected give zeros, they can simply be combined with an OR gate — what remains is the bit of the selected row.

1.2. The cell: a latch and a "tap"

The "tap" is an ordinary AND: O = Q · R. When R = 0, the output is 0 no matter what the latch holds.

1.3. The row: 4 cells with shared wires

The processor works with words of 4 bits, so we place the cells in fours. Each one has its own data bit D and its own output O, while "write" W and "give" R are shared by the whole row.

• W = 1 — all four latches are open, the word D3 D2 D1 D0 is written as a whole;
• R = 1 — all four "taps" are open, the word comes out on O3 O2 O1 O0.

1.4. Building

Place it in a new empty project: the test bench has its own switches and power. You need the first kit's chips NOT, AND, NOR, SRLatch, DLatch.

Step 1. The WORD4 chip

What we build. A memory row: four latches and four "taps".

INPUT PORTS: D0, D1, D2, D3, W, R · OUTPUT PORTS: O0, O1, O2, O3

Select all → Ctrl+G → in the Library double-click the chip name → WORD4.

Step 2. The test bench

What we build. A control panel for testing: four data switches, a "give" switch R, a "write" button W and two displays — what is on the switches and what the row gives out.

Both displays: ⚙ — width 4, view HEX; source — bus wD (switches) and wO (row output). Don't group the test bench into a chip.

1.5. Check

The switches wD0–wD3 are a binary number read right to left: wD0 is the low bit. 5 = 0101 (wD0 and wD2 on).

Right after power-on, while nothing has been written, with R = 1 the wO display is empty or orange (in Fast — F): the latches don't hold anything yet. That's how it should be — real memory also contains "whatever" at power-on.

If not:

Common mistake. When you copy a label, the editor appends a number to its name: R → R1, R2. Labels with different names are different wires. If the "tap" opens for only one bit, check the names of the R and W labels inside WORD4.

Lesson 1 paste (Cmd+I)

Into a new project with the first kit's chips.

chip WORD4 {  portIn(D0)  portIn(D1)  portIn(D2)  portIn(D3)  portIn(W)  portIn(R)  portOut(O0)  portOut(O1)  portOut(O2)  portOut(O3)  DLatch(D=D0, EN=W, Q=q0)  DLatch(D=D1, EN=W, Q=q1)  DLatch(D=D2, EN=W, Q=q2)  DLatch(D=D3, EN=W, Q=q3)  AND(q0, R, O0)  AND(q1, R, O1)  AND(q2, R, O2)  AND(q3, R, O3)} power(VCC)ground(GND)input(Out=wD0)input(Out=wD1)input(Out=wD2)input(Out=wD3)input(Out=wR)button{label="W", hostKey="KeyW"}(wW)WORD4(D0=wD0, D1=wD1, D2=wD2, D3=wD3, W=wW, R=wR, O0=wO0, O1=wO1, O2=wO2, O3=wO3)display{bits=4, base="HEX", busSource="wD"}()display{bits=4, base="HEX", busSource="wO"}()