Kits
›
Transistor Memory
RU
EN
ES
Contents
Before you start
A bit of history: how computers remembered
Lesson 1. Cell and row: a 4-bit word
1.1. The idea: memory is a lot of latches
1.2. The cell: a latch and a "tap"
1.3. The row: 4 cells with shared wires
1.4. Building
1.5. Check
Lesson 1 paste (Cmd+I)
Lesson 2. 16×4 memory: sixteen rows and picking one
2.1. The idea: pick one row out of sixteen
2.2. Why reading uses gates and not a shared wire
2.3. Building
2.4. Check
Lesson 2 paste (Cmd+I)
Lesson 3. 256×4 memory: the same circuit one level up
3.1. The idea: the address splits in half
3.2. The cost
3.3. Building
3.4. Check
Lesson 3 paste (Cmd+I)
Lesson 4. Your own memory in the processor — and the first error
4.1. What is in the machine now and how our memory differs
4.2. Memory at power-on — "whatever"
4.3. Building
4.4. Running it — and the error
4.5. Looking for the cause with the oscilloscope
Lesson 4 paste (Cmd+I)
Lesson 5. Two-phase clock: the write never meets a new address
5.1. The idea: put "new address" and "write" into different slices
5.2. Why it doesn't break now
5.3. Building
5.4. Check
Lesson 5 paste (Cmd+I)
Summary
All the parts
Instructions in pictures
Lesson 4 in pictures
← Back to the lesson: Lesson 4. Your own memory in the processor — and the first error
4
Our memory in the processor
put RAM256x4 into GW-CPU — and catch the bug
kh
GW-03
Q
NOT
1×
AND
1×
RAM256x4
1×
3
∞
© 2026 Daniil Khanin · khanin.info · GW-03
47
CANVAS
GW-CPU
1
Library
WORD4
RAM16x4
RAM256x4
⬇
chip-RAM256x4.json
Library
GW-CPU
…
⬆
Import
Use mine
Import
2
Delete
Memory (RAM)
A0…A7
ir0…ir7
D0…D3
acc0…acc3
WE
oST
CLK
CPUCLK
Q0…Q3
mq0…mq3
© 2026 Daniil Khanin · khanin.info · GW-03
48
GW-CPU …
3
NOT
1×
AND
1×
RAM256x4
1×
3
22×
NOT
A
CPUCLK
Y
nCLK
AND
A
oST
B
nCLK
Y
weRAM
RAM256x4
A0
ir0
A1
ir1
A2
ir2
A3
ir3
A4
ir4
A5
ir5
A6
ir6
A7
ir7
D0
acc0
D1
acc1
D2
acc2
D3
acc3
WE
weRAM
Q0
mq0
Q1
mq1
Q2
mq2
Q3
mq3
© 2026 Daniil Khanin · khanin.info · GW-03
49
CANVAS
4
ROM
512 × 16
Memory
⬆
⬇
0105 1012 1013 …
0105 1012 1013 …
0105 1012 1013 …
game-myram.rom.json
Fast
Q
wrong arm
L
5
w
add · trig · FROZEN
CPUCLK
ir0-7
0f
14
13
02
0d
GW-CPU.oST
GW-CPU.weRAM
the address changed and the window opened in one slice
© 2026 Daniil Khanin · khanin.info · GW-03
50
← Back to the lesson
Lesson 4. Your own memory in the processor — and the first error