Lesson 6. Bus buffers: 74HC244 and 74HC245

In pictures

After this lesson the library has the 74HC244 and the 74HC245 — the chips any computer bus relies on — and the canvas has a four-wire bus: two devices talk on it in turn, a third one listens or answers.


6.1. The idea: a bus and the third state

In a computer the processor, memory and devices sit on the same wires — the bus. If two outputs drive different values onto one wire, that is a short circuit. So everyone who sits on the bus has an output with a third state: only the one that is enabled talks, the others are disconnected. The 74HC244 has eight such outputs, in two groups of four with their own OE.

BUSdevice X1OE = 0talksdevice Y2OE = 1disconnectedthirdDIR = 1listensonly one talks; nobody — resistors keep 0 on the bus
A bus is the same wires for everyone. The one whose buffer is enabled talks, the others are disconnected by the third state and do not get in the way. Enable two at once and the outputs fight — a short circuit.

6.2. The idea: a buffer is a double inversion

Inside the 74HC244 every input is inverted twice: the value is the same, but the output is now strong and goes one way only — the bus does not "leak" back into the input. That is a buffer. And the third state is a switch at the output, as in the 74HC595.

6.3. The idea: both ways — two 74HC244

Memory on a bus is both read and written: the data goes one way, then the other. The 74HC245 passes both ways: DIR chooses the direction. Inside are two 74HC244 facing each other, and only one is ever enabled. A chip made of chips — like the 74HC390 and the 74HC595.

74HC2448 buffers11OE20VCC21A0192OE32Y0181Y041A1172A052Y1161Y161A2152A172Y2141Y281A3132A292Y3121Y310GND112A374HC2458 buffers ↔1DIR20VCC2A019OE3A118B04A217B15A316B26A415B37A514B48A613B59A712B610GND11B7
74HC244: two groups of four buffers A → Y, each with its own enable 1OE and 2OE (active 0). 74HC245: eight buffers between A and B, DIR chooses the direction (1 — A → B), OE disconnects both sides.

6.4. Building

The same project as in lesson 5: the library has all the chips of lessons 1–5.

Step 1. Chip 74HC244 — 2 × 4 buffers with a third state

Package pins from the datasheet: 1 1OE, 2 1A0, 3 2Y0, 4 1A1, 5 2Y1, 6 1A2, 7 2Y2, 8 1A3, 9 2Y3, 11 2A3, 12 1Y3, 13 2A2, 14 1Y2, 15 2A1, 16 1Y1, 17 2A0, 18 1Y0, 19 2OE; 10 — GND, 20 — VCC. Two groups of four: 1A0–1A3 → 1Y0–1Y3 and 2A0–2A3 → 2Y0–2Y3, each with its own enable — 1OE, 2OE (active 0). Inside, three 74HC04: every input is inverted twice — that makes a strong buffer that drives the signal one way only — plus two inversions of OE; at the output — a Transmission gate.

PartPinLabel
Input portoutput1OE
Input portoutput1A0
Input portoutput1A1
Input portoutput1A2
Input portoutput1A3
Input portoutput2A3
Input portoutput2A2
Input portoutput2A1
Input portoutput2A0
Input portoutput2OE
Output portinput2Y0
Output portinput2Y1
Output portinput2Y2
Output portinput2Y3
Output portinput1Y3
Output portinput1Y2
Output portinput1Y1
Output portinput1Y0
74HC041A
1Y
2A
2Y
3A
3Y
4Y
4A
5Y
5A
6Y
6A
1A0
n1A0
1A1
n1A1
1A2
n1A2
n1A3
1A3
n2A0
2A0
n2A1
2A1
74HC041A
1Y
2A
2Y
3A
3Y
4Y
4A
5Y
5A
6Y
6A
2A2
n2A2
2A3
n2A3
n1A0
b1A0
b1A1
n1A1
b1A2
n1A2
b1A3
n1A3
74HC041A
1Y
2A
2Y
3A
3Y
4Y
4A
5Y
5A
6Y
6A
n2A0
b2A0
n2A1
b2A1
n2A2
b2A2
b2A3
n2A3
e1
1OE
e2
2OE
Transmission gateA
Enable
B
b1A0
e1
1Y0
Transmission gateA
Enable
B
b1A1
e1
1Y1
Transmission gateA
Enable
B
b1A2
e1
1Y2
Transmission gateA
Enable
B
b1A3
e1
1Y3
Transmission gateA
Enable
B
b2A0
e2
2Y0
Transmission gateA
Enable
B
b2A1
e2
2Y1
Transmission gateA
Enable
B
b2A2
e2
2Y2
Transmission gateA
Enable
B
b2A3
e2
2Y3

Ctrl+G → name 74HC244. Legs: inputs 1OE, 1A0, 1A1, 1A2, 1A3, 2A3, 2A2, 2A1, 2A0, 2OE; outputs 2Y0, 2Y1, 2Y2, 2Y3, 1Y3, 1Y2, 1Y1, 1Y0.

Step 2. Chip 74HC245 — 8 bidirectional buffers

Package pins from the datasheet: 1 DIR, 2 A0, 3 A1, 4 A2, 5 A3, 6 A4, 7 A5, 8 A6, 9 A7, 11 B7, 12 B6, 13 B5, 14 B4, 15 B3, 16 B2, 17 B1, 18 B0, 19 OE; 10 — GND, 20 — VCC. DIR = 1 — data goes A → B, DIR = 0 — B → A; OE = 1 — both sides disconnected (active 0). Inside — two 74HC244, one per direction, and a 74HC04 and 74HC00 decide which one is enabled. Pins A and B work both ways.

PartPinLabel
Input portoutputDIR
Input portoutputA0
Input portoutputA1
Input portoutputA2
Input portoutputA3
Input portoutputA4
Input portoutputA5
Input portoutputA6
Input portoutputA7
Input portoutputOE
Output portinputB7
Output portinputB6
Output portinputB5
Output portinputB4
Output portinputB3
Output portinputB2
Output portinputB1
Output portinputB0
74HC041A
1Y
2A
2Y
3A
4A
5A
6A
OE
nOE
DIR
nDIR
GND
GND
GND
GND
74HC001A
1B
1Y
2A
2B
2Y
3A
3B
4A
4B
nOE
DIR
oAB
nOE
nDIR
oBA
GND
GND
GND
GND
74HC2441OE
2OE
1A0
1Y0
1A1
1Y1
1A2
1Y2
1A3
1Y3
2A0
2Y0
2A1
2Y1
2A2
2Y2
2A3
2Y3
oAB
oAB
A0
B0
A1
B1
A2
B2
A3
B3
A4
B4
A5
B5
A6
B6
A7
B7
74HC2441OE
2OE
1A0
1Y0
1A1
1Y1
1A2
1Y2
1A3
1Y3
2A0
2Y0
2A1
2Y1
2A2
2Y2
2A3
2Y3
oBA
oBA
B0
A0
B1
A1
B2
A2
B3
A3
B4
A4
B5
A5
B6
A6
B7
A7

Ctrl+G → name 74HC245. Legs: inputs DIR, A0, A1, A2, A3, A4, A5, A6, A7, OE; outputs B7, B6, B5, B4, B3, B2, B1, B0.

Step 3. Devices X and Y

Eight switches: X0–X3 — device X, Y0–Y3 — device Y.

PartPinLabel
Input (switch)outputX0
Input (switch)outputX1
Input (switch)outputX2
Input (switch)outputX3
Input (switch)outputY0
Input (switch)outputY1
Input (switch)outputY2
Input (switch)outputY3

Step 4. Who talks

SEL chooses who is on the bus: 0 — X, 1 — Y; OFF = 1 — nobody. The 74HC244 enable acts on a zero, so oeX = SEL OR OFF, oeY = NOT SEL OR OFF (74HC04 and 74HC32 from lesson 1).

PartPinLabel
Input (switch)outputSEL
Input (switch)outputOFF
74HC041A
1Y
2A
3A
4A
5A
6A
SEL
nSEL
GND
GND
GND
GND
GND
74HC321A
1B
1Y
2A
2B
2Y
3A
3B
4A
4B
SEL
OFF
oeX
nSEL
OFF
oeY
GND
GND
GND
GND

Step 5. 74HC244 onto the bus

The outputs of both groups go to the same wires BUS0–BUS3. That is the bus: only the enabled group talks, the other is disconnected — the third state.

PartPinLabel
74HC2441OE
2OE
1A0
1Y0
1A1
1Y1
1A2
1Y2
1A3
1Y3
2A0
2Y0
2A1
2Y1
2A2
2Y2
2A3
2Y3
oeX
oeY
X0
BUS0
X1
BUS1
X2
BUS2
X3
BUS3
Y0
BUS0
Y1
BUS1
Y2
BUS2
Y3
BUS3

Step 6. Bus resistors

When nobody talks, the resistors keep 0 on the bus.

PartPinLabel
Resistorend 1
end 2
BUS0
GND
Resistorend 1
end 2
BUS1
GND
Resistorend 1
end 2
BUS2
GND
Resistorend 1
end 2
BUS3
GND

Step 7. A third device through a 74HC245

DIR = 1 — bus → lamps K0–K3. DIR = 0 — the device switches KS0–KS3 through resistors → K → 74HC245 → bus. Here the resistor is the "weak" output of the switch: when the 74HC245 drives K itself, it is stronger and there is no conflict.

PartPinLabel
Input (switch)outputDIR
Input (switch)outputKS0
Input (switch)outputKS1
Input (switch)outputKS2
Input (switch)outputKS3
Resistorend 1
end 2
KS0
K0
Resistorend 1
end 2
KS1
K1
Resistorend 1
end 2
KS2
K2
Resistorend 1
end 2
KS3
K3
74HC245DIR
OE
A0
A1
A2
A3
A4
A5
A6
A7
B0
B1
B2
B3
B4
B5
B6
B7
DIR
GND
BUS0
BUS1
BUS2
BUS3
UA4
UA5
UA6
UA7
K0
K1
K2
K3
UB4
UB5
UB6
UB7

Step 8. Unused 74HC245 pins — through resistors

On a 74HC245, pins A and B are sometimes inputs and sometimes outputs: at DIR = 1 the chip drives B, at DIR = 0 — A. An output straight to GND is a short circuit (the editor will highlight it). So the unused A4–A7, B4–B7 go to ground through a resistor: it holds 0, and when the pin becomes an output, there is no conflict.

PartPinLabel
Resistorend 1
end 2
UA4
GND
Resistorend 1
end 2
UA5
GND
Resistorend 1
end 2
UA6
GND
Resistorend 1
end 2
UA7
GND
Resistorend 1
end 2
UB4
GND
Resistorend 1
end 2
UB5
GND
Resistorend 1
end 2
UB6
GND
Resistorend 1
end 2
UB7
GND

Step 9. Display and lamps

Display (bus) ⚙: width 4, DEC, bus BUS. Lamps K0–K3 are what the third device sees.

PartPinLabel
Display⚙width 4, DEC, bus BUS
LEDinputK0
LEDinputK1
LEDinputK2
LEDinputK3

6.5. Check

  1. Set the switches: X = 5 (X0 and X2), Y = 9 (Y0 and Y3), KS = 12 (KS2 and KS3). DIR = 1, OFF = 0.
  2. SEL = 0 — the bus display shows 5, lamps K show 5: X talks, the third device listens.
  3. SEL = 1 — 9 on the bus: Y talks.
  4. OFF = 1 — 0 on the bus: nobody talks, the resistors pull the wires to ground.
  5. Keeping OFF on, set DIR = 0 — 12 on the bus: now the third device talks, through the 74HC245 the other way.

The main bus rule: only one talks. If you turn OFF off at DIR = 0, two will drive the bus — a short circuit (in the simulator the wire turns red). On a real board chips burn this way.

What you seeWhat it is
display = X or Ythe enabled 74HC244 group talks
display = 0nobody talks — resistors to ground
lamps K = busthe 74HC245 drives A → B (DIR = 1)
display = KSthe 74HC245 drives B → A (DIR = 0)

Lesson 6 paste (Cmd+I)

On top of lesson 5.

# Lesson 6 — 74HC244 and 74HC245: bus buffers; a shared 4-wire bus — whoever is enabled talks.# Paste: Cmd+I on top of lesson 5. chip 74HC244 {  portIn(1OE)  portIn(1A0)  portIn(1A1)  portIn(1A2)  portIn(1A3)  portIn(2A3)  portIn(2A2)  portIn(2A1)  portIn(2A0)  portIn(2OE)  portOut(2Y0)  portOut(2Y1)  portOut(2Y2)  portOut(2Y3)  portOut(1Y3)  portOut(1Y2)  portOut(1Y1)  portOut(1Y0)  74HC04(1A=1A0, 1Y=n1A0, 2A=1A1, 2Y=n1A1, 3A=1A2, 3Y=n1A2, 4Y=n1A3, 4A=1A3, 5Y=n2A0, 5A=2A0, 6Y=n2A1, 6A=2A1)  74HC04(1A=2A2, 1Y=n2A2, 2A=2A3, 2Y=n2A3, 3A=n1A0, 3Y=b1A0, 4Y=b1A1, 4A=n1A1, 5Y=b1A2, 5A=n1A2, 6Y=b1A3, 6A=n1A3)  74HC04(1A=n2A0, 1Y=b2A0, 2A=n2A1, 2Y=b2A1, 3A=n2A2, 3Y=b2A2, 4Y=b2A3, 4A=n2A3, 5Y=e1, 5A=1OE, 6Y=e2, 6A=2OE)  tgate(b1A0, e1, 1Y0)  tgate(b1A1, e1, 1Y1)  tgate(b1A2, e1, 1Y2)  tgate(b1A3, e1, 1Y3)  tgate(b2A0, e2, 2Y0)  tgate(b2A1, e2, 2Y1)  tgate(b2A2, e2, 2Y2)  tgate(b2A3, e2, 2Y3)} chip 74HC245 {  portIn(DIR)  portIn(A0)  portIn(A1)  portIn(A2)  portIn(A3)  portIn(A4)  portIn(A5)  portIn(A6)  portIn(A7)  portIn(OE)  portOut(B7)  portOut(B6)  portOut(B5)  portOut(B4)  portOut(B3)  portOut(B2)  portOut(B1)  portOut(B0)  74HC04(1A=OE, 1Y=nOE, 2A=DIR, 2Y=nDIR, 3A=GND, 4A=GND, 5A=GND, 6A=GND)  74HC00(1A=nOE, 1B=DIR, 1Y=oAB, 2A=nOE, 2B=nDIR, 2Y=oBA, 3A=GND, 3B=GND, 4A=GND, 4B=GND)  74HC244(1OE=oAB, 2OE=oAB, 1A0=A0, 1Y0=B0, 1A1=A1, 1Y1=B1, 1A2=A2, 1Y2=B2, 1A3=A3, 1Y3=B3, 2A0=A4, 2Y0=B4, 2A1=A5, 2Y1=B5, 2A2=A6, 2Y2=B6, 2A3=A7, 2Y3=B7)  74HC244(1OE=oBA, 2OE=oBA, 1A0=B0, 1Y0=A0, 1A1=B1, 1Y1=A1, 1A2=B2, 1Y2=A2, 1A3=B3, 1Y3=A3, 2A0=B4, 2Y0=A4, 2A1=B5, 2Y1=A5, 2A2=B6, 2Y2=A6, 2A3=B7, 2Y3=A7)} input(X0)input(X1)input(X2)input(X3)input(Y0)input(Y1)input(Y2)input(Y3)input(SEL)input(OFF)74HC04(1A=SEL, 1Y=nSEL, 2A=GND, 3A=GND, 4A=GND, 5A=GND, 6A=GND)74HC32(1A=SEL, 1B=OFF, 1Y=oeX, 2A=nSEL, 2B=OFF, 2Y=oeY, 3A=GND, 3B=GND, 4A=GND, 4B=GND)74HC244(1OE=oeX, 2OE=oeY, 1A0=X0, 1Y0=BUS0, 1A1=X1, 1Y1=BUS1, 1A2=X2, 1Y2=BUS2, 1A3=X3, 1Y3=BUS3, 2A0=Y0, 2Y0=BUS0, 2A1=Y1, 2Y1=BUS1, 2A2=Y2, 2Y2=BUS2, 2A3=Y3, 2Y3=BUS3)resistor(BUS0, GND)resistor(BUS1, GND)resistor(BUS2, GND)resistor(BUS3, GND)input(DIR)input(KS0)input(KS1)input(KS2)input(KS3)resistor(KS0, K0)resistor(KS1, K1)resistor(KS2, K2)resistor(KS3, K3)74HC245(DIR=DIR, OE=GND, A0=BUS0, A1=BUS1, A2=BUS2, A3=BUS3, A4=UA4, A5=UA5, A6=UA6, A7=UA7, B0=K0, B1=K1, B2=K2, B3=K3, B4=UB4, B5=UB5, B6=UB6, B7=UB7)resistor(UA4, GND)resistor(UA5, GND)resistor(UA6, GND)resistor(UA7, GND)resistor(UB4, GND)resistor(UB5, GND)resistor(UB6, GND)resistor(UB7, GND)display{bits=4, base="DEC", busSource="BUS"}()led(K0)led(K1)led(K2)led(K3)

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