Kits
›
Memoria de transistores
RU
EN
ES
Contenido
Before you start
A bit of history: how computers remembered
Lesson 1. Cell and row: a 4-bit word
1.1. The idea: memory is a lot of latches
1.2. The cell: a latch and a "tap"
1.3. The row: 4 cells with shared wires
1.4. Building
1.5. Check
Lesson 1 paste (Cmd+I)
Lesson 2. 16×4 memory: sixteen rows and picking one
2.1. The idea: pick one row out of sixteen
2.2. Why reading uses gates and not a shared wire
2.3. Building
2.4. Check
Lesson 2 paste (Cmd+I)
Lesson 3. 256×4 memory: the same circuit one level up
3.1. The idea: the address splits in half
3.2. The cost
3.3. Building
3.4. Check
Lesson 3 paste (Cmd+I)
Lesson 4. Your own memory in the processor — and the first error
4.1. What is in the machine now and how our memory differs
4.2. Memory at power-on — "whatever"
4.3. Building
4.4. Running it — and the error
4.5. Looking for the cause with the oscilloscope
Lesson 4 paste (Cmd+I)
Lesson 5. Two-phase clock: the write never meets a new address
5.1. The idea: put "new address" and "write" into different slices
5.2. Why it doesn't break now
5.3. Building
5.4. Check
Lesson 5 paste (Cmd+I)
Summary
All the parts
Instructions in pictures
Instructions in pictures
Download PDF — the whole book
kh
POCKET LCD GAMES
build kits · khanin.info
Building
instructions
GW-03
Transistor Memory
lessons 1–5 · from a latch to our own memory in the processor
simulator: cs.khanin.info
© 2026 Daniil Khanin · khanin.info · GW-03
1
How to read these instructions
3
step number — follow strictly in order
AND
2×
6×
parts for this step: how many to place
AND
A
x
B
y
Y
z
a part with labels on its pins
CLK
CLK
labels with the same name are connected
A
Y
chip ports: input [ and output ]
DFF
blue frame — building a chip
CANVAS
grey tab — the main canvas
low
yellow ring — what has changed
remove a part together with its labels
2×
double-click a label — new name
3
chip built in the lesson with this number
check: this is how it should work
Keys
V
VCC (1)
G
GND (0)
N
transistor
I
switch
O
lamp
L
label
K
clock
U
button
[
port in
]
port out
Ctrl+G — into a chip
on a Mac Ctrl = Cmd
© 2026 Daniil Khanin · khanin.info · GW-03
2
A little history
1953
Whirlwind: cores
1966
Dennard: 1 transistor
1969
Apollo: a ROM of cores
1970
Intel 1103
now
you build it
The first computers remembered on ferrite rings the size of a poppy seed: a ring magnetised
clockwise or counter-clockwise is a bit. X and Y wires pass through every ring;
only the ring where two half-currents meet flips. The planes were woven by hand.
The Apollo Guidance Computer's ROM was woven from rings too: a wire through a ring is 1, around it is 0.
The program was not written but woven in at the factory.
In 1970 the Intel 1103 — 1,024 bits on a chip — replaced the rings. A real cell is 6 transistors,
or even one with a capacitor. Ours is a latch of gates, 22 transistors: in a simulator with ideal
switches that is more reliable. 1,024 such cells make 41,840 transistors.
X
Y
© 2026 Daniil Khanin · khanin.info · GW-03
3
1
Cell and row
a latch + an output "tap" → a 4-bit word
kh
GW-03
0
1
0
1
W
W
1
R
4b
5
wO
IN
6×
OUT
4×
DLatch
4×
AND
4×
VCC
1×
GND
1×
0
5×
Q
Q
1×
4b
0
A
2×
∞
Ctrl
+
G
WORD4
© 2026 Daniil Khanin · khanin.info · GW-03
4
WORD4
1
IN
6×
OUT
4×
D0
D1
D2
D3
W
R
O0
O1
O2
O3
2
DLatch
3×
9×
DLatch
D
D0
EN
W
Q
q0
nQ
DLatch
D
D1
EN
W
Q
q1
nQ
DLatch
D
D2
EN
W
Q
q2
nQ
3
DLatch
1×
AND
2×
9×
DLatch
D
D3
EN
W
Q
q3
nQ
AND
A
q0
B
R
Y
O0
AND
A
q1
B
R
Y
O1
© 2026 Daniil Khanin · khanin.info · GW-03
5
WORD4 …
CANVAS
4
AND
2×
6×
AND
A
q2
B
R
Y
O2
AND
A
q3
B
R
Y
O3
5
Ctrl
+
G
Library
…
Chip N
2×
Library
…
WORD4
Enter
WORD4
D0
D1
D2
D3
W
R
O0
O1
O2
O3
6
VCC
1×
GND
1×
2×
VCC
VCC
GND
GND
7
0
5×
5×
0
wD0
0
wD1
0
wD2
0
wD3
0
wR
© 2026 Daniil Khanin · khanin.info · GW-03
6
CANVAS …
8
Q
Q
1×
WORD4
1×
11×
W
W
wW
WORD4
D0
wD0
D1
wD1
D2
wD2
D3
wD3
W
wW
R
wR
O0
wO0
O1
wO1
O2
wO2
O3
wO3
9
4b
0
A
2×
4b
0
wD
4b
0
wO
10
4b
0
wD
⚙
4b
8b
HEX
PIN
wD
wO
Enter
0
1
0
1
W
W
4b
5
wO
1
0
1
0
W —
4b
5
wO
© 2026 Daniil Khanin · khanin.info · GW-03
7
2
16×4 memory
a decoder picks a row, an OR gathers the output
kh
GW-03
4b
0
mA
4b
2
mD
4b
1
mQ
IN
9×
OUT
4×
DEC16
1×
AND
16×
WORD4
16×
1
OR4
20×
0
8×
Q
Q
1×
4b
0
A
3×
∞
Ctrl
+
G
RAM16x4
© 2026 Daniil Khanin · khanin.info · GW-03
8
RAM16x4
1
IN
9×
OUT
4×
A0
A1
A2
A3
D0
D1
D2
D3
WE
Q0
Q1
Q2
Q3
2
DEC16
1×
20×
DEC16
I0
A0
I1
A1
I2
A2
I3
A3
Y0
r0
Y1
r1
Y2
r2
Y3
r3
Y4
r4
Y5
r5
Y6
r6
Y7
r7
Y8
r8
Y9
r9
Y10
r10
Y11
r11
Y12
r12
Y13
r13
Y14
r14
Y15
r15
3
AND
3×
9×
AND
A
r0
B
WE
Y
w0
AND
A
r1
B
WE
Y
w1
AND
A
r2
B
WE
Y
w2
© 2026 Daniil Khanin · khanin.info · GW-03
9
RAM16x4 …
4
AND
3×
9×
AND
A
r3
B
WE
Y
w3
AND
A
r4
B
WE
Y
w4
AND
A
r5
B
WE
Y
w5
5
AND
3×
9×
AND
A
r6
B
WE
Y
w6
AND
A
r7
B
WE
Y
w7
AND
A
r8
B
WE
Y
w8
6
AND
3×
9×
AND
A
r9
B
WE
Y
w9
AND
A
r10
B
WE
Y
w10
AND
A
r11
B
WE
Y
w11
© 2026 Daniil Khanin · khanin.info · GW-03
10
RAM16x4 …
7
AND
3×
9×
AND
A
r12
B
WE
Y
w12
AND
A
r13
B
WE
Y
w13
AND
A
r14
B
WE
Y
w14
8
AND
1×
WORD4
1×
1
13×
AND
A
r15
B
WE
Y
w15
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w0
R
r0
O0
c0_0
O1
c0_1
O2
c0_2
O3
c0_3
© 2026 Daniil Khanin · khanin.info · GW-03
11
RAM16x4 …
9
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w1
R
r1
O0
c1_0
O1
c1_1
O2
c1_2
O3
c1_3
10
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w2
R
r2
O0
c2_0
O1
c2_1
O2
c2_2
O3
c2_3
11
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w3
R
r3
O0
c3_0
O1
c3_1
O2
c3_2
O3
c3_3
© 2026 Daniil Khanin · khanin.info · GW-03
12
RAM16x4 …
12
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w4
R
r4
O0
c4_0
O1
c4_1
O2
c4_2
O3
c4_3
13
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w5
R
r5
O0
c5_0
O1
c5_1
O2
c5_2
O3
c5_3
14
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w6
R
r6
O0
c6_0
O1
c6_1
O2
c6_2
O3
c6_3
© 2026 Daniil Khanin · khanin.info · GW-03
13
RAM16x4 …
15
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w7
R
r7
O0
c7_0
O1
c7_1
O2
c7_2
O3
c7_3
16
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w8
R
r8
O0
c8_0
O1
c8_1
O2
c8_2
O3
c8_3
17
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w9
R
r9
O0
c9_0
O1
c9_1
O2
c9_2
O3
c9_3
© 2026 Daniil Khanin · khanin.info · GW-03
14
RAM16x4 …
18
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w10
R
r10
O0
c10_0
O1
c10_1
O2
c10_2
O3
c10_3
19
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w11
R
r11
O0
c11_0
O1
c11_1
O2
c11_2
O3
c11_3
20
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w12
R
r12
O0
c12_0
O1
c12_1
O2
c12_2
O3
c12_3
© 2026 Daniil Khanin · khanin.info · GW-03
15
RAM16x4 …
21
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w13
R
r13
O0
c13_0
O1
c13_1
O2
c13_2
O3
c13_3
22
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w14
R
r14
O0
c14_0
O1
c14_1
O2
c14_2
O3
c14_3
23
WORD4
1×
1
10×
WORD4
D0
D0
D1
D1
D2
D2
D3
D3
W
w15
R
r15
O0
c15_0
O1
c15_1
O2
c15_2
O3
c15_3
24
OR4
2×
10×
OR4
A
c0_0
B
c1_0
C
c2_0
D
c3_0
Y
g0_0
OR4
A
c4_0
B
c5_0
C
c6_0
D
c7_0
Y
g1_0
© 2026 Daniil Khanin · khanin.info · GW-03
16
RAM16x4 …
25
OR4
2×
10×
OR4
A
c8_0
B
c9_0
C
c10_0
D
c11_0
Y
g2_0
OR4
A
c12_0
B
c13_0
C
c14_0
D
c15_0
Y
g3_0
26
OR4
2×
10×
OR4
A
g0_0
B
g1_0
C
g2_0
D
g3_0
Y
Q0
OR4
A
c0_1
B
c1_1
C
c2_1
D
c3_1
Y
g0_1
© 2026 Daniil Khanin · khanin.info · GW-03
17
RAM16x4 …
27
OR4
2×
10×
OR4
A
c4_1
B
c5_1
C
c6_1
D
c7_1
Y
g1_1
OR4
A
c8_1
B
c9_1
C
c10_1
D
c11_1
Y
g2_1
28
OR4
2×
10×
OR4
A
c12_1
B
c13_1
C
c14_1
D
c15_1
Y
g3_1
OR4
A
g0_1
B
g1_1
C
g2_1
D
g3_1
Y
Q1
29
OR4
2×
10×
OR4
A
c0_2
B
c1_2
C
c2_2
D
c3_2
Y
g0_2
OR4
A
c4_2
B
c5_2
C
c6_2
D
c7_2
Y
g1_2
© 2026 Daniil Khanin · khanin.info · GW-03
18
RAM16x4 …
30
OR4
2×
10×
OR4
A
c8_2
B
c9_2
C
c10_2
D
c11_2
Y
g2_2
OR4
A
c12_2
B
c13_2
C
c14_2
D
c15_2
Y
g3_2
31
OR4
2×
10×
OR4
A
g0_2
B
g1_2
C
g2_2
D
g3_2
Y
Q2
OR4
A
c0_3
B
c1_3
C
c2_3
D
c3_3
Y
g0_3
32
OR4
2×
10×
OR4
A
c4_3
B
c5_3
C
c6_3
D
c7_3
Y
g1_3
OR4
A
c8_3
B
c9_3
C
c10_3
D
c11_3
Y
g2_3
© 2026 Daniil Khanin · khanin.info · GW-03
19
RAM16x4 …
33
OR4
2×
10×
OR4
A
c12_3
B
c13_3
C
c14_3
D
c15_3
Y
g3_3
OR4
A
g0_3
B
g1_3
C
g2_3
D
g3_3
Y
Q3
34
Ctrl
+
G
Library
…
Chip N
2×
Library
…
RAM16x4
Enter
RAM16x4
A0
A1
A2
A3
D0
D1
D2
D3
WE
Q0
Q1
Q2
Q3
© 2026 Daniil Khanin · khanin.info · GW-03
20
CANVAS
35
0
5×
5×
0
mA0
0
mA1
0
mA2
0
mA3
0
mD0
36
0
3×
3×
0
mD1
0
mD2
0
mD3
37
Q
Q
1×
1×
WE
WE
mWE
38
RAM16x4
1×
13×
RAM16x4
A0
mA0
A1
mA1
A2
mA2
A3
mA3
D0
mD0
D1
mD1
D2
mD2
D3
mD3
WE
mWE
Q0
mQ0
Q1
mQ1
Q2
mQ2
Q3
mQ3
© 2026 Daniil Khanin · khanin.info · GW-03
21
CANVAS …
39
4b
0
A
3×
4b
0
mA
4b
0
mD
4b
0
mQ
40
4b
0
mA
⚙
4b
8b
HEX
PIN
mA
mD
mQ
Enter
4b
0
mA
4b
1
mD
WE
WE
4b
1
mQ
4b
1
mA
4b
2
mD
WE
WE
4b
2
mQ
4b
0
mA
4b
2
mD
4b
1
mQ
© 2026 Daniil Khanin · khanin.info · GW-03
22
3
256×4 memory
the same circuit one level up: 16 blocks
kh
GW-03
8b
10
mA
4b
9
mD
4b
3
mQ
IN
13×
OUT
4×
DEC16
1×
AND
80×
RAM16x4
16×
2
OR4
20×
0
12×
Q
Q
1×
4b
0
A
3×
∞
Ctrl
+
G
RAM256x4
© 2026 Daniil Khanin · khanin.info · GW-03
23
CANVAS
1
Delete
0
mA0
0
mA1
0
mA2
0
mA3
0
mD0
0
mD1
0
mD2
0
mD3
WE
WE
mWE
RAM16x4
A0
mA0
A1
mA1
A2
mA2
A3
mA3
D0
mD0
D1
mD1
D2
mD2
D3
mD3
WE
mWE
Q0
mQ0
Q1
mQ1
Q2
mQ2
Q3
mQ3
4b
0
mA
4b
0
mD
4b
0
mQ
© 2026 Daniil Khanin · khanin.info · GW-03
24
RAM256x4
2
IN
13×
OUT
4×
A0
A1
A2
A3
A4
A5
A6
A7
D0
D1
D2
D3
WE
Q0
Q1
Q2
Q3
3
DEC16
1×
20×
DEC16
I0
A4
I1
A5
I2
A6
I3
A7
Y0
b0
Y1
b1
Y2
b2
Y3
b3
Y4
b4
Y5
b5
Y6
b6
Y7
b7
Y8
b8
Y9
b9
Y10
b10
Y11
b11
Y12
b12
Y13
b13
Y14
b14
Y15
b15
4
AND
3×
9×
AND
A
b0
B
WE
Y
w0
AND
A
b1
B
WE
Y
w1
AND
A
b2
B
WE
Y
w2
© 2026 Daniil Khanin · khanin.info · GW-03
25
RAM256x4 …
5
AND
3×
9×
AND
A
b3
B
WE
Y
w3
AND
A
b4
B
WE
Y
w4
AND
A
b5
B
WE
Y
w5
6
AND
3×
9×
AND
A
b6
B
WE
Y
w6
AND
A
b7
B
WE
Y
w7
AND
A
b8
B
WE
Y
w8
7
AND
3×
9×
AND
A
b9
B
WE
Y
w9
AND
A
b10
B
WE
Y
w10
AND
A
b11
B
WE
Y
w11
© 2026 Daniil Khanin · khanin.info · GW-03
26
RAM256x4 …
8
AND
3×
9×
AND
A
b12
B
WE
Y
w12
AND
A
b13
B
WE
Y
w13
AND
A
b14
B
WE
Y
w14
9
AND
1×
3×
AND
A
b15
B
WE
Y
w15
10
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w0
Q0
m0_0
Q1
m0_1
Q2
m0_2
Q3
m0_3
© 2026 Daniil Khanin · khanin.info · GW-03
27
RAM256x4 …
11
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w1
Q0
m1_0
Q1
m1_1
Q2
m1_2
Q3
m1_3
12
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w2
Q0
m2_0
Q1
m2_1
Q2
m2_2
Q3
m2_3
13
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w3
Q0
m3_0
Q1
m3_1
Q2
m3_2
Q3
m3_3
© 2026 Daniil Khanin · khanin.info · GW-03
28
RAM256x4 …
14
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w4
Q0
m4_0
Q1
m4_1
Q2
m4_2
Q3
m4_3
15
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w5
Q0
m5_0
Q1
m5_1
Q2
m5_2
Q3
m5_3
16
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w6
Q0
m6_0
Q1
m6_1
Q2
m6_2
Q3
m6_3
© 2026 Daniil Khanin · khanin.info · GW-03
29
RAM256x4 …
17
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w7
Q0
m7_0
Q1
m7_1
Q2
m7_2
Q3
m7_3
18
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w8
Q0
m8_0
Q1
m8_1
Q2
m8_2
Q3
m8_3
19
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w9
Q0
m9_0
Q1
m9_1
Q2
m9_2
Q3
m9_3
© 2026 Daniil Khanin · khanin.info · GW-03
30
RAM256x4 …
20
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w10
Q0
m10_0
Q1
m10_1
Q2
m10_2
Q3
m10_3
21
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w11
Q0
m11_0
Q1
m11_1
Q2
m11_2
Q3
m11_3
22
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w12
Q0
m12_0
Q1
m12_1
Q2
m12_2
Q3
m12_3
© 2026 Daniil Khanin · khanin.info · GW-03
31
RAM256x4 …
23
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w13
Q0
m13_0
Q1
m13_1
Q2
m13_2
Q3
m13_3
24
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w14
Q0
m14_0
Q1
m14_1
Q2
m14_2
Q3
m14_3
25
RAM16x4
1×
2
13×
RAM16x4
A0
A0
A1
A1
A2
A2
A3
A3
D0
D0
D1
D1
D2
D2
D3
D3
WE
w15
Q0
m15_0
Q1
m15_1
Q2
m15_2
Q3
m15_3
26
AND
3×
9×
AND
A
m0_0
B
b0
Y
c0_0
AND
A
m0_1
B
b0
Y
c0_1
AND
A
m0_2
B
b0
Y
c0_2
© 2026 Daniil Khanin · khanin.info · GW-03
32
RAM256x4 …
27
AND
3×
9×
AND
A
m0_3
B
b0
Y
c0_3
AND
A
m1_0
B
b1
Y
c1_0
AND
A
m1_1
B
b1
Y
c1_1
28
AND
3×
9×
AND
A
m1_2
B
b1
Y
c1_2
AND
A
m1_3
B
b1
Y
c1_3
AND
A
m2_0
B
b2
Y
c2_0
© 2026 Daniil Khanin · khanin.info · GW-03
33
RAM256x4 …
29
AND
3×
9×
AND
A
m2_1
B
b2
Y
c2_1
AND
A
m2_2
B
b2
Y
c2_2
AND
A
m2_3
B
b2
Y
c2_3
30
AND
3×
9×
AND
A
m3_0
B
b3
Y
c3_0
AND
A
m3_1
B
b3
Y
c3_1
AND
A
m3_2
B
b3
Y
c3_2
31
AND
3×
9×
AND
A
m3_3
B
b3
Y
c3_3
AND
A
m4_0
B
b4
Y
c4_0
AND
A
m4_1
B
b4
Y
c4_1
© 2026 Daniil Khanin · khanin.info · GW-03
34
RAM256x4 …
32
AND
3×
9×
AND
A
m4_2
B
b4
Y
c4_2
AND
A
m4_3
B
b4
Y
c4_3
AND
A
m5_0
B
b5
Y
c5_0
33
AND
3×
9×
AND
A
m5_1
B
b5
Y
c5_1
AND
A
m5_2
B
b5
Y
c5_2
AND
A
m5_3
B
b5
Y
c5_3
34
AND
3×
9×
AND
A
m6_0
B
b6
Y
c6_0
AND
A
m6_1
B
b6
Y
c6_1
AND
A
m6_2
B
b6
Y
c6_2
© 2026 Daniil Khanin · khanin.info · GW-03
35
RAM256x4 …
35
AND
3×
9×
AND
A
m6_3
B
b6
Y
c6_3
AND
A
m7_0
B
b7
Y
c7_0
AND
A
m7_1
B
b7
Y
c7_1
36
AND
3×
9×
AND
A
m7_2
B
b7
Y
c7_2
AND
A
m7_3
B
b7
Y
c7_3
AND
A
m8_0
B
b8
Y
c8_0
37
AND
3×
9×
AND
A
m8_1
B
b8
Y
c8_1
AND
A
m8_2
B
b8
Y
c8_2
AND
A
m8_3
B
b8
Y
c8_3
© 2026 Daniil Khanin · khanin.info · GW-03
36
RAM256x4 …
38
AND
3×
9×
AND
A
m9_0
B
b9
Y
c9_0
AND
A
m9_1
B
b9
Y
c9_1
AND
A
m9_2
B
b9
Y
c9_2
39
AND
3×
9×
AND
A
m9_3
B
b9
Y
c9_3
AND
A
m10_0
B
b10
Y
c10_0
AND
A
m10_1
B
b10
Y
c10_1
40
AND
3×
9×
AND
A
m10_2
B
b10
Y
c10_2
AND
A
m10_3
B
b10
Y
c10_3
AND
A
m11_0
B
b11
Y
c11_0
© 2026 Daniil Khanin · khanin.info · GW-03
37
RAM256x4 …
41
AND
3×
9×
AND
A
m11_1
B
b11
Y
c11_1
AND
A
m11_2
B
b11
Y
c11_2
AND
A
m11_3
B
b11
Y
c11_3
42
AND
3×
9×
AND
A
m12_0
B
b12
Y
c12_0
AND
A
m12_1
B
b12
Y
c12_1
AND
A
m12_2
B
b12
Y
c12_2
43
AND
3×
9×
AND
A
m12_3
B
b12
Y
c12_3
AND
A
m13_0
B
b13
Y
c13_0
AND
A
m13_1
B
b13
Y
c13_1
© 2026 Daniil Khanin · khanin.info · GW-03
38
RAM256x4 …
44
AND
3×
9×
AND
A
m13_2
B
b13
Y
c13_2
AND
A
m13_3
B
b13
Y
c13_3
AND
A
m14_0
B
b14
Y
c14_0
45
AND
3×
9×
AND
A
m14_1
B
b14
Y
c14_1
AND
A
m14_2
B
b14
Y
c14_2
AND
A
m14_3
B
b14
Y
c14_3
46
AND
3×
9×
AND
A
m15_0
B
b15
Y
c15_0
AND
A
m15_1
B
b15
Y
c15_1
AND
A
m15_2
B
b15
Y
c15_2
© 2026 Daniil Khanin · khanin.info · GW-03
39
RAM256x4 …
47
AND
1×
3×
AND
A
m15_3
B
b15
Y
c15_3
48
OR4
2×
10×
OR4
A
c0_0
B
c1_0
C
c2_0
D
c3_0
Y
g0_0
OR4
A
c4_0
B
c5_0
C
c6_0
D
c7_0
Y
g1_0
49
OR4
2×
10×
OR4
A
c8_0
B
c9_0
C
c10_0
D
c11_0
Y
g2_0
OR4
A
c12_0
B
c13_0
C
c14_0
D
c15_0
Y
g3_0
© 2026 Daniil Khanin · khanin.info · GW-03
40
RAM256x4 …
50
OR4
2×
10×
OR4
A
g0_0
B
g1_0
C
g2_0
D
g3_0
Y
Q0
OR4
A
c0_1
B
c1_1
C
c2_1
D
c3_1
Y
g0_1
51
OR4
2×
10×
OR4
A
c4_1
B
c5_1
C
c6_1
D
c7_1
Y
g1_1
OR4
A
c8_1
B
c9_1
C
c10_1
D
c11_1
Y
g2_1
© 2026 Daniil Khanin · khanin.info · GW-03
41
RAM256x4 …
52
OR4
2×
10×
OR4
A
c12_1
B
c13_1
C
c14_1
D
c15_1
Y
g3_1
OR4
A
g0_1
B
g1_1
C
g2_1
D
g3_1
Y
Q1
53
OR4
2×
10×
OR4
A
c0_2
B
c1_2
C
c2_2
D
c3_2
Y
g0_2
OR4
A
c4_2
B
c5_2
C
c6_2
D
c7_2
Y
g1_2
54
OR4
2×
10×
OR4
A
c8_2
B
c9_2
C
c10_2
D
c11_2
Y
g2_2
OR4
A
c12_2
B
c13_2
C
c14_2
D
c15_2
Y
g3_2
© 2026 Daniil Khanin · khanin.info · GW-03
42
RAM256x4 …
55
OR4
2×
10×
OR4
A
g0_2
B
g1_2
C
g2_2
D
g3_2
Y
Q2
OR4
A
c0_3
B
c1_3
C
c2_3
D
c3_3
Y
g0_3
56
OR4
2×
10×
OR4
A
c4_3
B
c5_3
C
c6_3
D
c7_3
Y
g1_3
OR4
A
c8_3
B
c9_3
C
c10_3
D
c11_3
Y
g2_3
57
OR4
2×
10×
OR4
A
c12_3
B
c13_3
C
c14_3
D
c15_3
Y
g3_3
OR4
A
g0_3
B
g1_3
C
g2_3
D
g3_3
Y
Q3
© 2026 Daniil Khanin · khanin.info · GW-03
43
RAM256x4 …
CANVAS
58
Ctrl
+
G
Library
…
Chip N
2×
Library
…
RAM256x4
Enter
RAM256x4
A0
A1
A2
A3
A4
A5
A6
A7
D0
D1
D2
D3
WE
Q0
Q1
Q2
Q3
59
0
5×
5×
0
mA0
0
mA1
0
mA2
0
mA3
0
mA4
60
0
5×
5×
0
mA5
0
mA6
0
mA7
0
mD0
0
mD1
© 2026 Daniil Khanin · khanin.info · GW-03
44
CANVAS …
61
0
2×
2×
0
mD2
0
mD3
62
Q
Q
1×
1×
WE
WE
mWE
63
RAM256x4
1×
17×
RAM256x4
A0
mA0
A1
mA1
A2
mA2
A3
mA3
A4
mA4
A5
mA5
A6
mA6
A7
mA7
D0
mD0
D1
mD1
D2
mD2
D3
mD3
WE
mWE
Q0
mQ0
Q1
mQ1
Q2
mQ2
Q3
mQ3
© 2026 Daniil Khanin · khanin.info · GW-03
45
CANVAS …
64
4b
0
A
3×
8b
0
mA
4b
0
mD
4b
0
mQ
65
4b
0
mA
⚙
4b
8b
HEX
PIN
mA
mD
mQ
Enter
8b
00
mA
4b
1
mD
WE
WE
4b
1
mQ
8b
10
mA
4b
3
mD
WE
WE
4b
3
mQ
8b
00
mA
4b
9
mD
4b
1
mQ
© 2026 Daniil Khanin · khanin.info · GW-03
46
4
Our memory in the processor
put RAM256x4 into GW-CPU — and catch the bug
kh
GW-03
Q
NOT
1×
AND
1×
RAM256x4
1×
3
∞
© 2026 Daniil Khanin · khanin.info · GW-03
47
CANVAS
GW-CPU
1
Library
WORD4
RAM16x4
RAM256x4
⬇
chip-RAM256x4.json
Library
GW-CPU
…
⬆
Import
Use mine
Import
2
Delete
Memory (RAM)
A0…A7
ir0…ir7
D0…D3
acc0…acc3
WE
oST
CLK
CPUCLK
Q0…Q3
mq0…mq3
© 2026 Daniil Khanin · khanin.info · GW-03
48
GW-CPU …
3
NOT
1×
AND
1×
RAM256x4
1×
3
22×
NOT
A
CPUCLK
Y
nCLK
AND
A
oST
B
nCLK
Y
weRAM
RAM256x4
A0
ir0
A1
ir1
A2
ir2
A3
ir3
A4
ir4
A5
ir5
A6
ir6
A7
ir7
D0
acc0
D1
acc1
D2
acc2
D3
acc3
WE
weRAM
Q0
mq0
Q1
mq1
Q2
mq2
Q3
mq3
© 2026 Daniil Khanin · khanin.info · GW-03
49
CANVAS
4
ROM
512 × 16
Memory
⬆
⬇
0105 1012 1013 …
0105 1012 1013 …
0105 1012 1013 …
game-myram.rom.json
Fast
Q
wrong arm
L
5
w
add · trig · FROZEN
CPUCLK
ir0-7
0f
14
13
02
0d
GW-CPU.oST
GW-CPU.weRAM
the address changed and the window opened in one slice
© 2026 Daniil Khanin · khanin.info · GW-03
50
5
Two-phase clock
divide by 2 and a write window: the game works
kh
GW-03
Q
NOT
1×
AND
1×
DFF
1×
AND3
1×
∞
© 2026 Daniil Khanin · khanin.info · GW-03
51
GW-CPU
1
Delete
NOT
A
CPUCLK
Y
nCLK
AND
A
oST
B
nCLK
Y
weRAM
2
NOT
1×
AND
1×
DFF
1×
AND3
1×
13×
NOT
A
RST
Y
nRST
AND
A
nCLK2
B
nRST
Y
dCLK2
DFF
D
dCLK2
CLK
CPUCLK
Q
CLK2
nQ
nCLK2
AND3
A
oST
B
nCLK2
C
CPUCLK
Y
weRAM
© 2026 Daniil Khanin · khanin.info · GW-03
52
GW-CPU …
3
ram ACC
Q0
acc0
CLK
CLK2
CPUCLK
on all 28 registers, pin CLK: label CPUCLK → CLK2
28×
ACC
FZ
FC
PC
PH
PT
P
HT
H
MT
M
STK
STATE
T0
T0HI
T1
T1HI
T2
T2HI
T3
T3HI
ARMS
BODY
MISS
OVER
FALL
COMET
LEVEL
⚠ don't rename this one: cut the wire and place a new label
CPUCLK
CPUCLK
CLK2
ram …
© 2026 Daniil Khanin · khanin.info · GW-03
53
CANVAS
4
w
add · trig · FROZEN
CPUCLK
GW-CPU.CLK2
ir0-7
61
14
13
GW-CPU.oST
GW-CPU.weRAM
the window comes a slice after the address and closes early
Fast
Q
L
© 2026 Daniil Khanin · khanin.info · GW-03
54
Kit parts
how many times you place each part over all the lessons
VCC
1×
GND
1×
0
25×
4b
0
A
8×
Q
Q
3×
IN
28×
OUT
12×
1025×
© 2026 Daniil Khanin · khanin.info · GW-03
55
Kit chips
this kit's chips carry a lesson number; without one — from earlier kits
DLatch
4×
AND
102×
DEC16
2×
OR4
40×
NOT
2×
DFF
1×
AND3
1×
WORD4
17×
1
RAM16x4
17×
2
RAM256x4
2×
3
© 2026 Daniil Khanin · khanin.info · GW-03
56
Done!
the game runs on memory you built yourself: 1,024 bits, 41,840 transistors
Q / A — left pipes, P / L — right pipes, space — new game
© 2026 Daniil Khanin · khanin.info · GW-03
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Copyright
© 2026 Daniil Khanin, khanin.info. All rights reserved.
These instructions, the drawings, circuits, screen and the game "Star Harvest" are original work.
The GW-03 kit "Transistor Memory" is distributed free of charge.
Reprinting, publishing online, selling or passing it on to others,
in whole or in part, is prohibited without the written permission of the author.
The latest version is at khanin.info.
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khanin.info
GW-03
© 2026 Daniil Khanin · khanin.info · GW-03
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