Summary
Done: "Star Harvest" and the watch run on memory you built yourself — 1,024 bits in latches, 256 words of 4 bits, inside the processor in place of the ram primitive.
What we got
| Part | Made of |
|---|---|
| bit | the first kit's DLatch + an AND "tap" — 22 transistors |
| WORD4 row | 4 cells with shared "write" W and "give" R |
| RAM16x4 | DEC16 picks the row, AND(r, WE) — write, OR — read — 2,544 transistors |
| RAM256x4 | 16 × RAM16x4: the high address bits pick the block — 41,840 transistors |
| write window | AND3(oST, nCLK2, CPUCLK) — the second clock phase |
| two-phase clock | DFF divider CPUCLK / 2 → CLK2 for all registers |
Three lessons from one memory
- Memory at power-on is "whatever". Latches come up however they happen to, and the program itself clears what it reads before writing. Every real computer does this at startup.
- A shared wire is not for ideal switches. Real chips put cells on a shared wire and get by with analog tricks. In a world of ideal switches it is more reliable to build reading from
AND-ORgates. - The write window must not meet an address change. The
ramprimitive writes instantly, on the edge. Latch memory needs a window, and the window needs its own time, separate from the address change. Hence the two clock phases — like φ1 and φ2 in the Intel 8080 and MOS 6502.
What's next
- ROM from transistors. The processor has one memory primitive left — the ROM with the program. It can be built as a matrix: a transistor at the crossing of a row and a column is 1, no transistor is 0. The program becomes a picture.
- More memory. 1,024 words is four
RAM256x4and one more level of block selection. The circuit is the same; only the transistor count grows.